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[src/trunk]: src/sys/arch/sparc/dev allow userland to map SX registers and IO...
details: https://anonhg.NetBSD.org/src/rev/2bf1e6000ba4
branches: trunk
changeset: 787024:2bf1e6000ba4
user: macallan <macallan%NetBSD.org@localhost>
date: Wed May 29 22:26:39 2013 +0000
description:
allow userland to map SX registers and IO space
diffstat:
sys/arch/sparc/dev/cgfourteen.c | 23 ++++++++++++++++++++++-
sys/arch/sparc/dev/cgfourteenvar.h | 4 +++-
2 files changed, 25 insertions(+), 2 deletions(-)
diffs (82 lines):
diff -r f9246146d4da -r 2bf1e6000ba4 sys/arch/sparc/dev/cgfourteen.c
--- a/sys/arch/sparc/dev/cgfourteen.c Wed May 29 22:25:23 2013 +0000
+++ b/sys/arch/sparc/dev/cgfourteen.c Wed May 29 22:26:39 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cgfourteen.c,v 1.72 2013/02/12 22:24:47 macallan Exp $ */
+/* $NetBSD: cgfourteen.c,v 1.73 2013/05/29 22:26:39 macallan Exp $ */
/*
* Copyright (c) 1996
@@ -554,8 +554,26 @@
off < CG14_R32_VOFF + (sc->sc_vramsize >> 2)) {
offset = sc->sc_fbaddr + CG14_FB_PR32;
off -= CG14_R32_VOFF;
+#if NSX > 0
+ } else if (sc->sc_sx == NULL) {
+ return -1;
+ } else if (off >= CG14_SXREG_VOFF &&
+ off < (CG14_SXREG_VOFF + 0x400)) {
+ return (bus_space_mmap(sc->sc_sx->sc_tag, sc->sc_sx->sc_uregs,
+ 0, prot, BUS_SPACE_MAP_LINEAR));
+ } else if (off >= CG14_SXIO_VOFF &&
+ off < (CG14_SXIO_VOFF + 0x03ffffff)) {
+ return (bus_space_mmap(sc->sc_sx->sc_tag, 0x800000000LL,
+ sc->sc_fb_paddr, prot, BUS_SPACE_MAP_LINEAR));
+#endif
} else
return -1;
+ /*
+ * for convenience we also map the SX ranges here:
+ * - one page userland registers
+ * - CG14-sized IO space at 0x800000000 ( not a typo, it's above 4GB )
+ * bus_space_mmap() should accept 64bit bus_addr_t's by the look of it
+ */
return (bus_space_mmap(sc->sc_bustag, offset, off, prot,
BUS_SPACE_MAP_LINEAR));
}
@@ -1203,6 +1221,7 @@
* until we're 32bit aligned, then do the rest in 32bit
* mode. Assumes that stride is always a multiple of 4.
*/
+ /* TODO: use 32bit writes with byte mask instead */
pre = addr & 3;
if (pre != 0) pre = 4 - pre;
for (line = 0; line < he; line++) {
@@ -1241,6 +1260,7 @@
* until we're 32bit aligned, then do the rest in 32bit
* mode. Assumes that stride is always a multiple of 4.
*/
+ /* TODO: use 32bit writes with byte mask instead */
pre = addr & 3;
if (pre != 0) pre = 4 - pre;
for (line = 0; line < he; line++) {
@@ -1356,6 +1376,7 @@
}
} else {
/* unaligned, have to use byte mode */
+ /* funnel shifter & byte mask trickery? */
for (line = 0; line < he; line++) {
sptr = saddr;
dptr = daddr;
diff -r f9246146d4da -r 2bf1e6000ba4 sys/arch/sparc/dev/cgfourteenvar.h
--- a/sys/arch/sparc/dev/cgfourteenvar.h Wed May 29 22:25:23 2013 +0000
+++ b/sys/arch/sparc/dev/cgfourteenvar.h Wed May 29 22:26:39 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cgfourteenvar.h,v 1.15 2013/02/06 04:10:54 macallan Exp $ */
+/* $NetBSD: cgfourteenvar.h,v 1.16 2013/05/29 22:26:39 macallan Exp $ */
/*
* Copyright (c) 1996
@@ -120,6 +120,7 @@
#define CG14_CLUT1_VOFF 0x00004000 /* Color Look Up Table */
#define CG14_CLUT2_VOFF 0x00005000 /* Color Look Up Table */
#define CG14_CLUT3_VOFF 0x00006000 /* Color Look Up Table */
+#define CG14_SXREG_VOFF 0x00010000 /* SX userspace registers */
#define CG14_DIRECT_VOFF 0x10000000
#define CG14_CTLREG_VOFF 0x20000000
#define CG14_CURSOR_VOFF 0x30000000
@@ -132,3 +133,4 @@
#define CG14_B32_VOFF 0xa0000000
#define CG14_G32_VOFF 0xb0000000
#define CG14_R32_VOFF 0xc0000000
+#define CG14_SXIO_VOFF 0xd0000000
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