[src/trunk]: src/sys/arch/arm/arm If the L1 instruction cache policy is PIPT, ...

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9459c8f186f2
branches:  trunk
changeset: 787339:9459c8f186f2
user:      matt <matt%NetBSD.org@localhost>
date:      Wed Jun 12 00:35:34 2013 +0000

description:
If the L1 instruction cache policy is PIPT, don't set the prefer_mask.

diffstat:

 sys/arch/arm/arm/cpufunc.c |  8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diffs (29 lines):

diff -r 383662395466 -r 9459c8f186f2 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Tue Jun 11 22:59:54 2013 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Wed Jun 12 00:35:34 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.120 2013/05/19 15:37:06 rkujawa Exp $    */
+/*     $NetBSD: cpufunc.c,v 1.121 2013/06/12 00:35:34 matt Exp $       */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.120 2013/05/19 15:37:06 rkujawa Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.121 2013/06/12 00:35:34 matt Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -1551,7 +1551,9 @@
        if (CPU_CT_FORMAT(ctype) == 4) {
                u_int clidr = armreg_clidr_read();
 
-               arm_cache_prefer_mask = PAGE_SIZE;
+               if (CPU_CT4_L1IPOLICY(ctype) != CPU_CT4_L1_PIPT) {
+                       arm_cache_prefer_mask = PAGE_SIZE;
+               }
                arm_pcache.cache_type = CPU_CT_CTYPE_WB14;
 
                get_cacheinfo_clidr(&arm_pcache, 0, clidr & 7);