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[src/trunk]: src/sys/arch/mips/mips Comment consistency. No functional change.



details:   https://anonhg.NetBSD.org/src/rev/27ebfeefb843
branches:  trunk
changeset: 817603:27ebfeefb843
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat Aug 27 07:22:14 2016 +0000

description:
Comment consistency.  No functional change.

diffstat:

 sys/arch/mips/mips/mipsX_subr.S |  25 +++++++++++++++++--------
 1 files changed, 17 insertions(+), 8 deletions(-)

diffs (55 lines):

diff -r 184f3b64bbac -r 27ebfeefb843 sys/arch/mips/mips/mipsX_subr.S
--- a/sys/arch/mips/mips/mipsX_subr.S   Sat Aug 27 06:31:42 2016 +0000
+++ b/sys/arch/mips/mips/mipsX_subr.S   Sat Aug 27 07:22:14 2016 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mipsX_subr.S,v 1.92 2016/08/17 20:59:08 skrll Exp $    */
+/*     $NetBSD: mipsX_subr.S,v 1.93 2016/08/27 07:22:14 skrll Exp $    */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -1540,10 +1540,16 @@
         */
        mfc0    v1, MIPS_COP_0_STATUS
 #ifdef NOFPU
+       /*
+        * enter kernel mode
+        */
        MFC0_HAZARD
-       and     v0, v1, MIPS_SR_KSU_MASK|MIPS_SR_EXL
-       xor     v0, v1                          # clear the bits
+       and     v0, v1, MIPS_SR_EXL|MIPS_SR_KSU_MASK # bits to clear
+       xor     v0, v1                          # clear them.
 #else
+       /*
+        * Turn off FPU and enter kernel mode
+        */
        lui     v0, %hi(~(MIPS_SR_COP_1_BIT|MIPS_SR_EXL|MIPS_SR_KSU_MASK))
        addiu   v0, %lo(~(MIPS_SR_COP_1_BIT|MIPS_SR_EXL|MIPS_SR_KSU_MASK))
        and     v0, v1
@@ -1729,18 +1735,21 @@
 #endif
        PTR_L   s0, L_PROC(MIPS_CURLWP)         # curlwp->l_proc
        PTR_L   t9, P_MD_SYSCALL(s0)            # t9 = syscall
+#ifdef NOFPU
+       /*
+        * enter kernel mode
+        */
+       and     t0, a1, MIPS_SR_EXL|MIPS_SR_KSU_MASK # bits to clear
+       xor     t0, a1                          # clear them.
+#else
        /*
         * Turn off FPU and enter kernel mode
         */
-#ifdef NOFPU
-       and     t0, a1, MIPS_SR_EXL|MIPS_SR_KSU_MASK
-       xor     t0, a1                          # turns off the FPU & ints on
-#else
        lui     t0, %hi(~(MIPS_SR_COP_1_BIT|MIPS_SR_EXL|MIPS_SR_KSU_MASK))
        addiu   t0, %lo(~(MIPS_SR_COP_1_BIT|MIPS_SR_EXL|MIPS_SR_KSU_MASK))
        and     t0, a1
 #endif
-       mtc0    t0, MIPS_COP_0_STATUS           # re-enable interrupts
+       mtc0    t0, MIPS_COP_0_STATUS
        COP0_SYNC
 /*
  * Call the system call handler.



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