[src/trunk]: src/sys/dev/pci - Set the TX DMA segment size based on the MTU s...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/efb0670604d5
branches:  trunk
changeset: 787846:efb0670604d5
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Mon Jul 08 05:36:23 2013 +0000

description:
- Set the TX DMA segment size based on the MTU size.
- Change the TX ring size for 5717 series and 57764 series.
- For 57766, set BGE_RDMAMODE_JMB_2K_MMRR for non-jumbo frame.
  Same as Linux tg3.
- For 57765 and newer devices, set BGE_MAX_RX_FRAME_LOWAT to 1.
  This value is recommended by the document.

diffstat:

 sys/dev/pci/if_bge.c    |  38 ++++++++++++++++++++++++++++++++------
 sys/dev/pci/if_bgereg.h |   7 +++++--
 2 files changed, 37 insertions(+), 8 deletions(-)

diffs (127 lines):

diff -r ebc2f66dd933 -r efb0670604d5 sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c      Mon Jul 08 05:24:34 2013 +0000
+++ b/sys/dev/pci/if_bge.c      Mon Jul 08 05:36:23 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bge.c,v 1.257 2013/07/08 05:24:34 msaitoh Exp $     */
+/*     $NetBSD: if_bge.c,v 1.258 2013/07/08 05:36:23 msaitoh Exp $     */
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.257 2013/07/08 05:24:34 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.258 2013/07/08 05:36:23 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -1952,8 +1952,10 @@
 static int
 bge_init_tx_ring(struct bge_softc *sc)
 {
+       struct ifnet *ifp = &sc->ethercom.ec_if;
        int i;
        bus_dmamap_t dmamap;
+       bus_size_t maxsegsz;
        struct txdmamap_pool_entry *dma;
 
        if (sc->bge_flags & BGE_TXRING_VALID)
@@ -1975,10 +1977,18 @@
        if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5700_BX)
                bge_writembx(sc, BGE_MBX_TX_NIC_PROD0_LO, 0);
 
+       /* Limit DMA segment size for some chips */
+       if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766) &&
+           (ifp->if_mtu <= ETHERMTU))
+               maxsegsz = 2048;
+       else if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5719)
+               maxsegsz = 4096;
+       else
+               maxsegsz = ETHER_MAX_LEN_JUMBO;
        SLIST_INIT(&sc->txdma_list);
        for (i = 0; i < BGE_TX_RING_CNT; i++) {
                if (bus_dmamap_create(sc->bge_dmatag, BGE_TXDMA_MAX,
-                   BGE_NTXSEG, ETHER_MAX_LEN_JUMBO, 0, BUS_DMA_NOWAIT,
+                   BGE_NTXSEG, maxsegsz, 0, BUS_DMA_NOWAIT,
                    &dmamap))
                        return ENOBUFS;
                if (dmamap == NULL)
@@ -2769,6 +2779,10 @@
        if (BGE_IS_5700_FAMILY(sc)) {
                /* 5700 to 5704 had 16 send rings. */
                limit = BGE_TX_RINGS_EXTSSRAM_MAX;
+       } else if (BGE_IS_5717_PLUS(sc)) {
+               limit = BGE_TX_RINGS_5717_MAX;
+       } else if (BGE_IS_57765_FAMILY(sc)) {
+               limit = BGE_TX_RINGS_57765_MAX;
        } else
                limit = 1;
        rcb_addr = BGE_MEMWIN_START + BGE_SEND_RING_RCB;
@@ -3024,6 +3038,10 @@
 
        if (sc->bge_flags & BGE_PCIE)
                val |= BGE_RDMAMODE_FIFO_LONG_BURST;
+       if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766) {
+               if (ifp->if_mtu <= ETHERMTU)
+                       val |= BGE_RDMAMODE_JMB_2K_MMRR;
+       }
        if (sc->bge_flags & BGE_TSO)
                val |= BGE_RDMAMODE_TSO4_ENABLE;
 
@@ -5244,7 +5262,7 @@
 {
        struct bge_softc *sc = ifp->if_softc;
        const uint16_t *m;
-       uint32_t mode;
+       uint32_t mode, reg;
        int s, error = 0;
 
        s = splnet();
@@ -5353,8 +5371,16 @@
        /* 5718 step 66 */
        DELAY(10);
 
-       /* 5718 step 12 */
-       CSR_WRITE_4(sc, BGE_MAX_RX_FRAME_LOWAT, 2);
+       /* 5718 step 12, 57XX step 37 */
+       /*
+        * XXX Doucments of 5718 series and 577xx say the recommended value
+        * is 1, but tg3 set 1 only on 57765 series.
+        */
+       if (BGE_IS_57765_PLUS(sc))
+               reg = 1;
+       else
+               reg = 2;
+       CSR_WRITE_4_FLUSH(sc, BGE_MAX_RX_FRAME_LOWAT, reg);
 
        /* Tell firmware we're alive. */
        BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
diff -r ebc2f66dd933 -r efb0670604d5 sys/dev/pci/if_bgereg.h
--- a/sys/dev/pci/if_bgereg.h   Mon Jul 08 05:24:34 2013 +0000
+++ b/sys/dev/pci/if_bgereg.h   Mon Jul 08 05:36:23 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bgereg.h,v 1.82 2013/07/08 05:24:34 msaitoh Exp $   */
+/*     $NetBSD: if_bgereg.h,v 1.83 2013/07/08 05:36:23 msaitoh Exp $   */
 /*
  * Copyright (c) 2001 Wind River Systems
  * Copyright (c) 1997, 1998, 1999, 2001
@@ -607,7 +607,9 @@
 #define BGE_MBX_TX_NIC_PROD15_HI       0x03F8
 #define BGE_MBX_TX_NIC_PROD15_LO       0x03FC
 
-#define BGE_TX_RINGS_MAX               4
+#define BGE_TX_RINGS_MAX               1
+#define BGE_TX_RINGS_57765_MAX         2
+#define BGE_TX_RINGS_5717_MAX          4
 #define BGE_TX_RINGS_EXTSSRAM_MAX      16
 #define BGE_RX_RINGS_MAX               16
 
@@ -1510,6 +1512,7 @@
 #define BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN        0x00002000
 #define BGE_RDMAMODE_FIFO_SIZE_128     0x00020000
 #define BGE_RDMAMODE_FIFO_LONG_BURST   0x00030000
+#define BGE_RDMAMODE_JMB_2K_MMRR       0x00800000
 #define        BGE_RDMAMODE_MULT_DMA_RD_DIS    0x01000000
 #define        BGE_RDMAMODE_TSO4_ENABLE        0x08000000
 #define        BGE_RDMAMODE_TSO6_ENABLE        0x10000000