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[src/netbsd-7]: src Pull up following revision(s) (requested by jmcneill in t...
details: https://anonhg.NetBSD.org/src/rev/73719ba633f6
branches: netbsd-7
changeset: 800271:73719ba633f6
user: snj <snj%NetBSD.org@localhost>
date: Wed Jul 26 15:22:35 2017 +0000
description:
Pull up following revision(s) (requested by jmcneill in ticket #1435):
sys/arch/arm/arm32/cpu.c: 1.113 via patch
sys/arch/arm/broadcom/bcm2835_bsc.c: 1.6 via patch
sys/arch/arm/broadcom/bcm2835_plcom.c: 1.4 via patch
sys/arch/arm/cortex/gtmr.c: 1.18 via patch
sys/arch/arm/include/armreg.h: 1.110 via patch
sys/arch/arm/include/vfpreg.h: 1.15 via patch
sys/arch/arm/vfp/vfp_init.c: 1.50 via patch
sys/arch/evbarm/rpi/rpi_machdep.c: 1.59, 1.70-1.72 via patch
sys/arch/evbarm/rpi/vcprop.h: 1.16
Get the RPI3 working (in aarch32 mode) by recognising Cortex A53 CPUs.
While I'm here add some A57/A72 info as well.
My RPI3 works with FB console - the uart needs some help with its clocks.
--
Do invalidate the cache as RPI2 build with Clang can't fetch the memory
config otherwise.
--
Use the VC property mailbox to request the UART clock rate and use it
appropriately
Newer firmwares use 48MHz
--
Disable BSC0 on Raspberry Pi 3 and Zero W boards.
--
Interrupts are enabled before the timer is configured. Ensure that the
timer is disabled when attaching so it doesn't go crazy between the time
interrupts are enabled and clocks are initialized. My RPI3 makes it
multi-user now.
--
Enable UART0 (PL011) on GPIO header for Raspberry Pi 3 / Zero W
diffstat:
external/broadcom/rpi-firmware/dist/bootcode.bin | Bin
external/broadcom/rpi-firmware/dist/fixup.dat | Bin
external/broadcom/rpi-firmware/dist/fixup_cd.dat | Bin
external/broadcom/rpi-firmware/dist/start.elf | Bin
external/broadcom/rpi-firmware/dist/start_cd.elf | Bin
sys/arch/arm/arm32/cpu.c | 12 ++-
sys/arch/arm/broadcom/bcm2835_bsc.c | 13 ++-
sys/arch/arm/broadcom/bcm2835_plcom.c | 12 ++-
sys/arch/arm/cortex/gtmr.c | 8 +-
sys/arch/arm/include/armreg.h | 12 ++-
sys/arch/arm/include/vfpreg.h | 3 +-
sys/arch/arm/vfp/vfp_init.c | 5 +-
sys/arch/evbarm/rpi/rpi_machdep.c | 90 ++++++++++++++++++++--
sys/arch/evbarm/rpi/vcprop.h | 24 +++++-
14 files changed, 155 insertions(+), 24 deletions(-)
diffs (truncated from 439 to 300 lines):
diff -r 09ac2fde90c3 -r 73719ba633f6 external/broadcom/rpi-firmware/dist/bootcode.bin
Binary file external/broadcom/rpi-firmware/dist/bootcode.bin has changed
diff -r 09ac2fde90c3 -r 73719ba633f6 external/broadcom/rpi-firmware/dist/fixup.dat
Binary file external/broadcom/rpi-firmware/dist/fixup.dat has changed
diff -r 09ac2fde90c3 -r 73719ba633f6 external/broadcom/rpi-firmware/dist/fixup_cd.dat
Binary file external/broadcom/rpi-firmware/dist/fixup_cd.dat has changed
diff -r 09ac2fde90c3 -r 73719ba633f6 external/broadcom/rpi-firmware/dist/start.elf
Binary file external/broadcom/rpi-firmware/dist/start.elf has changed
diff -r 09ac2fde90c3 -r 73719ba633f6 external/broadcom/rpi-firmware/dist/start_cd.elf
Binary file external/broadcom/rpi-firmware/dist/start_cd.elf has changed
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/arm/arm32/cpu.c
--- a/sys/arch/arm/arm32/cpu.c Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/arm/arm32/cpu.c Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.104.4.1 2015/04/06 01:57:57 snj Exp $ */
+/* $NetBSD: cpu.c,v 1.104.4.2 2017/07/26 15:22:36 snj Exp $ */
/*
* Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.104.4.1 2015/04/06 01:57:57 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.104.4.2 2017/07/26 15:22:36 snj Exp $");
#include <sys/systm.h>
#include <sys/conf.h>
@@ -511,6 +511,14 @@
pN_steppings, "7A" },
{ CPU_ID_CORTEXA15R3, CPU_CLASS_CORTEX, "Cortex-A15 r3",
pN_steppings, "7A" },
+ { CPU_ID_CORTEXA53R0, CPU_CLASS_CORTEX, "Cortex-A53 r0",
+ pN_steppings, "8A" },
+ { CPU_ID_CORTEXA57R0, CPU_CLASS_CORTEX, "Cortex-A57 r0",
+ pN_steppings, "8A" },
+ { CPU_ID_CORTEXA57R1, CPU_CLASS_CORTEX, "Cortex-A57 r1",
+ pN_steppings, "8A" },
+ { CPU_ID_CORTEXA72R0, CPU_CLASS_CORTEX, "Cortex-A72 r0",
+ pN_steppings, "8A" },
{ CPU_ID_MV88SV581X_V6, CPU_CLASS_PJ4B, "Sheeva 88SV581x",
generic_steppings },
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/arm/broadcom/bcm2835_bsc.c
--- a/sys/arch/arm/broadcom/bcm2835_bsc.c Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/arm/broadcom/bcm2835_bsc.c Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_bsc.c,v 1.2.4.1 2014/09/11 13:46:49 martin Exp $ */
+/* $NetBSD: bcm2835_bsc.c,v 1.2.4.2 2017/07/26 15:22:36 snj Exp $ */
/*
* Copyright (c) 2012 Jonathan A. Kollasch
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_bsc.c,v 1.2.4.1 2014/09/11 13:46:49 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_bsc.c,v 1.2.4.2 2017/07/26 15:22:36 snj Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -99,8 +99,10 @@
{
struct bsciic_softc * const sc = device_private(self);
struct amba_attach_args * const aaa = aux;
+ prop_dictionary_t prop = device_properties(self);
struct i2cbus_attach_args iba;
u_int bscunit = ~0;
+ bool disable = false;
static ONCE_DECL(control);
switch (aaa->aaa_addr) {
@@ -112,6 +114,13 @@
break;
}
+ prop_dictionary_get_bool(prop, "disable", &disable);
+ if (disable) {
+ aprint_naive(": disabled\n");
+ aprint_normal(": disabled\n");
+ return;
+ }
+
aprint_naive("\n");
aprint_normal(": BSC%u\n", bscunit);
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/arm/broadcom/bcm2835_plcom.c
--- a/sys/arch/arm/broadcom/bcm2835_plcom.c Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/arm/broadcom/bcm2835_plcom.c Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_plcom.c,v 1.1 2012/07/26 06:21:57 skrll Exp $ */
+/* $NetBSD: bcm2835_plcom.c,v 1.1.18.1 2017/07/26 15:22:36 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
/* Interface to plcom (PL011) serial driver. */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_plcom.c,v 1.1 2012/07/26 06:21:57 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_plcom.c,v 1.1.18.1 2017/07/26 15:22:36 snj Exp $");
#include <sys/types.h>
#include <sys/device.h>
@@ -69,11 +69,19 @@
bcm2835_plcom_attach(device_t parent, device_t self, void *aux)
{
struct plcom_softc *sc = device_private(self);
+ prop_dictionary_t dict = device_properties(self);
struct amba_attach_args *aaa = aux;
void *ih;
sc->sc_dev = self;
sc->sc_frequency = BCM2835_UART0_CLK;
+
+ /* Fetch the UART clock frequency from property if set. */
+ prop_number_t frequency = prop_dictionary_get(dict, "frequency");
+ if (frequency != NULL) {
+ sc->sc_frequency = prop_number_integer_value(frequency);
+ }
+
sc->sc_hwflags = PLCOM_HW_TXFIFO_DISABLE;
sc->sc_swflags = 0;
sc->sc_set_mcr = NULL;
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/arm/cortex/gtmr.c
--- a/sys/arch/arm/cortex/gtmr.c Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/arm/cortex/gtmr.c Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gtmr.c,v 1.8.2.2 2015/04/06 01:55:53 snj Exp $ */
+/* $NetBSD: gtmr.c,v 1.8.2.3 2017/07/26 15:22:36 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.8.2.2 2015/04/06 01:55:53 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.8.2.3 2017/07/26 15:22:36 snj Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -147,6 +147,10 @@
gtmr_timecounter.tc_frequency = sc->sc_freq;
tc_init(>mr_timecounter);
+
+ /* Disable the timer until we are ready */
+ armreg_cntv_ctl_write(0);
+ armreg_cntp_ctl_write(0);
}
void
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/arm/include/armreg.h Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.97.2.2 2016/12/08 07:41:14 snj Exp $ */
+/* $NetBSD: armreg.h,v 1.97.2.3 2017/07/26 15:22:36 snj Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -226,12 +226,20 @@
#define CPU_ID_CORTEXA9R4 0x414fc090
#define CPU_ID_CORTEXA15R2 0x412fc0f0
#define CPU_ID_CORTEXA15R3 0x413fc0f0
-#define CPU_ID_CORTEX_P(n) ((n & 0xff0ff000) == 0x410fc000)
+#define CPU_ID_CORTEXA53R0 0x410fd030
+#define CPU_ID_CORTEXA57R0 0x410fd070
+#define CPU_ID_CORTEXA57R1 0x411fd070
+#define CPU_ID_CORTEXA72R0 0x410fd080
+
+#define CPU_ID_CORTEX_P(n) ((n & 0xff0fe000) == 0x410fc000)
#define CPU_ID_CORTEX_A5_P(n) ((n & 0xff0ff0f0) == 0x410fc050)
#define CPU_ID_CORTEX_A7_P(n) ((n & 0xff0ff0f0) == 0x410fc070)
#define CPU_ID_CORTEX_A8_P(n) ((n & 0xff0ff0f0) == 0x410fc080)
#define CPU_ID_CORTEX_A9_P(n) ((n & 0xff0ff0f0) == 0x410fc090)
#define CPU_ID_CORTEX_A15_P(n) ((n & 0xff0ff0f0) == 0x410fc0f0)
+#define CPU_ID_CORTEX_A53_P(n) ((n & 0xff0ff0f0) == 0x410fd030)
+#define CPU_ID_CORTEX_A57_P(n) ((n & 0xff0ff0f0) == 0x410fd070)
+#define CPU_ID_CORTEX_A72_P(n) ((n & 0xff0ff0f0) == 0x410fd080)
#define CPU_ID_SA110 0x4401a100
#define CPU_ID_SA1100 0x4401a110
#define CPU_ID_TI925T 0x54029250
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/arm/include/vfpreg.h
--- a/sys/arch/arm/include/vfpreg.h Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/arm/include/vfpreg.h Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vfpreg.h,v 1.13 2014/03/18 07:03:22 matt Exp $ */
+/* $NetBSD: vfpreg.h,v 1.13.4.1 2017/07/26 15:22:36 snj Exp $ */
/*
* Copyright (c) 2008 ARM Ltd
@@ -64,6 +64,7 @@
#define FPU_VFP_CORTEXA8 0x410330c0
#define FPU_VFP_CORTEXA9 0x41033090
#define FPU_VFP_CORTEXA15 0x410330f0
+#define FPU_VFP_CORTEXA53 0x41034030
#define FPU_VFP_MV88SV58XX 0x56022090
#define VFP_FPEXC_EX 0x80000000 /* EXception status bit */
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/arm/vfp/vfp_init.c
--- a/sys/arch/arm/vfp/vfp_init.c Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/arm/vfp/vfp_init.c Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vfp_init.c,v 1.41.2.2 2015/03/26 08:53:48 snj Exp $ */
+/* $NetBSD: vfp_init.c,v 1.41.2.3 2017/07/26 15:22:37 snj Exp $ */
/*
* Copyright (c) 2008 ARM Ltd
@@ -94,6 +94,7 @@
case FPU_VFP_CORTEXA8:
case FPU_VFP_CORTEXA9:
case FPU_VFP_CORTEXA15:
+ case FPU_VFP_CORTEXA53:
#endif
load_vfpregs_hi(fregs->vfp_regs);
#ifdef CPU_ARM11
@@ -115,6 +116,7 @@
case FPU_VFP_CORTEXA8:
case FPU_VFP_CORTEXA9:
case FPU_VFP_CORTEXA15:
+ case FPU_VFP_CORTEXA53:
#endif
save_vfpregs_hi(fregs->vfp_regs);
#ifdef CPU_ARM11
@@ -312,6 +314,7 @@
case FPU_VFP_CORTEXA8:
case FPU_VFP_CORTEXA9:
case FPU_VFP_CORTEXA15:
+ case FPU_VFP_CORTEXA53:
if (armreg_cpacr_read() & CPACR_V7_ASEDIS) {
model = "VFP 4.0+";
} else {
diff -r 09ac2fde90c3 -r 73719ba633f6 sys/arch/evbarm/rpi/rpi_machdep.c
--- a/sys/arch/evbarm/rpi/rpi_machdep.c Tue Jul 25 19:51:29 2017 +0000
+++ b/sys/arch/evbarm/rpi/rpi_machdep.c Wed Jul 26 15:22:35 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rpi_machdep.c,v 1.43.2.6 2016/02/26 22:52:53 snj Exp $ */
+/* $NetBSD: rpi_machdep.c,v 1.43.2.7 2017/07/26 15:22:37 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.43.2.6 2016/02/26 22:52:53 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.43.2.7 2017/07/26 15:22:37 snj Exp $");
#include "opt_arm_debug.h"
#include "opt_bcm283x.h"
@@ -73,6 +73,7 @@
#include <arm/broadcom/bcm2835var.h>
#include <arm/broadcom/bcm2835_pmvar.h>
#include <arm/broadcom/bcm2835_mbox.h>
+#include <arm/broadcom/bcm2835_gpio_subr.h>
#include <evbarm/rpi/vcio.h>
#include <evbarm/rpi/vcpm.h>
@@ -130,6 +131,8 @@
#define RPI_FB_HEIGHT 720
#endif
+int uart_clk = BCM2835_UART0_CLK;
+
#define PLCONADDR BCM2835_UART0_BASE
#ifndef CONSDEVNAME
@@ -176,6 +179,36 @@
static struct __aligned(16) {
struct vcprop_buffer_hdr vb_hdr;
+ struct vcprop_tag_clockrate vbt_uartclockrate;
+ struct vcprop_tag_boardrev vbt_boardrev;
+ struct vcprop_tag end;
+} vb_uart = {
+ .vb_hdr = {
+ .vpb_len = sizeof(vb_uart),
+ .vpb_rcode = VCPROP_PROCESS_REQUEST,
+ },
+ .vbt_uartclockrate = {
+ .tag = {
+ .vpt_tag = VCPROPTAG_GET_CLOCKRATE,
+ .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_uartclockrate),
+ .vpt_rcode = VCPROPTAG_REQUEST
+ },
+ .id = VCPROP_CLK_UART
+ },
+ .vbt_boardrev = {
+ .tag = {
+ .vpt_tag = VCPROPTAG_GET_BOARDREVISION,
+ .vpt_len = VCPROPTAG_LEN(vb_uart.vbt_boardrev),
+ .vpt_rcode = VCPROPTAG_REQUEST
+ },
+ },
+ .end = {
+ .vpt_tag = VCPROPTAG_NULL
+ }
+};
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