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[src/perseant-stdc-iso10646]: src/sys/arch 2739767
details: https://anonhg.NetBSD.org/src/rev/ee2e3babbe2e
branches: perseant-stdc-iso10646
changeset: 850648:ee2e3babbe2e
user: cherry <cherry%NetBSD.org@localhost>
date: Sun Jul 16 06:14:24 2017 +0000
description:
2739767
diffstat:
sys/arch/x86/isa/isa_machdep.c | 405 ++++++++++++++++++
sys/arch/xen/include/pci_machdep.h | 82 +++
sys/arch/xen/x86/intr.c | 475 +++++++++++++++++++++
sys/arch/xen/xen/pciback.c | 807 +++++++++++++++++++++++++++++++++++++
sys/arch/xen/xen/pciide_machdep.c | 127 +++++
5 files changed, 1896 insertions(+), 0 deletions(-)
diffs (truncated from 1916 to 300 lines):
diff -r 29f9951929c8 -r ee2e3babbe2e sys/arch/x86/isa/isa_machdep.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/x86/isa/isa_machdep.c Sun Jul 16 06:14:24 2017 +0000
@@ -0,0 +1,405 @@
+/* $NetBSD: isa_machdep.c,v 1.35.2.2 2017/07/16 06:14:24 cherry Exp $ */
+
+/*-
+ * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
+ * Simulation Facility, NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
+ * Copyright (c) 1991 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * William Jolitz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)isa.c 7.2 (Berkeley) 5/13/91
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.35.2.2 2017/07/16 06:14:24 cherry Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/syslog.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+#include <sys/mbuf.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+
+#include <machine/bus_private.h>
+#include <machine/pio.h>
+#include <machine/cpufunc.h>
+#include <machine/autoconf.h>
+#include <machine/bootinfo.h>
+
+#include <dev/isa/isareg.h>
+#include <dev/isa/isavar.h>
+
+#include <uvm/uvm_extern.h>
+
+#include "acpica.h"
+#include "opt_acpi.h"
+#include "ioapic.h"
+
+#if NIOAPIC > 0
+#include <machine/i82093var.h>
+#include <machine/mpbiosvar.h>
+#endif
+
+static int _isa_dma_may_bounce(bus_dma_tag_t, bus_dmamap_t, int, int *);
+
+struct x86_bus_dma_tag isa_bus_dma_tag = {
+ ._tag_needs_free = 0,
+ ._bounce_thresh = ISA_DMA_BOUNCE_THRESHOLD,
+ ._bounce_alloc_lo = 0,
+ ._bounce_alloc_hi = ISA_DMA_BOUNCE_THRESHOLD,
+ ._may_bounce = _isa_dma_may_bounce,
+};
+
+#define IDTVEC(name) __CONCAT(X,name)
+typedef void (vector)(void);
+extern vector *IDTVEC(intr)[];
+
+#define LEGAL_IRQ(x) ((x) >= 0 && (x) < NUM_LEGACY_IRQS && (x) != 2)
+
+int
+isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
+{
+ int i, tmp, bestirq, count;
+ struct intrhand **p, *q;
+ struct intrsource *isp;
+ struct cpu_info *ci;
+
+ if (type == IST_NONE)
+ panic("intr_alloc: bogus type");
+
+ ci = &cpu_info_primary;
+
+ bestirq = -1;
+ count = -1;
+
+ /* some interrupts should never be dynamically allocated */
+ mask &= 0xdef8;
+
+ /*
+ * XXX some interrupts will be used later (6 for fdc, 12 for pms).
+ * the right answer is to do "breadth-first" searching of devices.
+ */
+ mask &= 0xefbf;
+
+ mutex_enter(&cpu_lock);
+
+ for (i = 0; i < NUM_LEGACY_IRQS; i++) {
+ if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0)
+ continue;
+ isp = ci->ci_isources[i];
+ if (isp == NULL) {
+ /* if nothing's using the irq, just return it */
+ *irq = i;
+ mutex_exit(&cpu_lock);
+ return 0;
+ }
+
+ switch(isp->is_type) {
+ case IST_EDGE:
+ case IST_LEVEL:
+ if (type != isp->is_type)
+ continue;
+ /*
+ * if the irq is shareable, count the number of other
+ * handlers, and if it's smaller than the last irq like
+ * this, remember it
+ *
+ * XXX We should probably also consider the
+ * interrupt level and stick IPL_TTY with other
+ * IPL_TTY, etc.
+ */
+ for (p = &isp->is_handlers, tmp = 0; (q = *p) != NULL;
+ p = &q->ih_next, tmp++)
+ ;
+ if ((bestirq == -1) || (count > tmp)) {
+ bestirq = i;
+ count = tmp;
+ }
+ break;
+ case IST_PULSE:
+ /* this just isn't shareable */
+ continue;
+ }
+ }
+
+ mutex_exit(&cpu_lock);
+
+ if (bestirq == -1)
+ return 1;
+
+ *irq = bestirq;
+
+ return 0;
+}
+
+const struct evcnt *
+isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
+{
+ /* XXX for now, no evcnt parent reported */
+ return NULL;
+}
+
+void *
+isa_intr_establish(isa_chipset_tag_t ic, int irq, int type, int level,
+ int (*ih_fun)(void *), void *ih_arg)
+{
+ return isa_intr_establish_xname(ic, irq, type, level,
+ ih_fun, ih_arg, "unknown");
+}
+
+void *
+isa_intr_establish_xname(isa_chipset_tag_t ic, int irq, int type, int level,
+ int (*ih_fun)(void *), void *ih_arg, const char *xname)
+{
+ struct pic *pic;
+ int pin;
+#if NIOAPIC > 0
+ intr_handle_t mpih;
+ struct ioapic_softc *ioapic = NULL;
+#endif
+
+ pin = irq;
+ pic = &i8259_pic;
+
+#if NIOAPIC > 0
+ if (mp_busses != NULL) {
+ if (intr_find_mpmapping(mp_isa_bus, irq, &mpih) == 0 ||
+ intr_find_mpmapping(mp_eisa_bus, irq, &mpih) == 0) {
+ if (!APIC_IRQ_ISLEGACY(mpih)) {
+ pin = APIC_IRQ_PIN(mpih);
+ ioapic = ioapic_find(APIC_IRQ_APIC(mpih));
+ if (ioapic == NULL) {
+ printf("isa_intr_establish: "
+ "unknown apic %d\n",
+ APIC_IRQ_APIC(mpih));
+ return NULL;
+ }
+ pic = &ioapic->sc_pic;
+ }
+ } else
+ printf("isa_intr_establish: no MP mapping found\n");
+ }
+#endif
+#if defined(XEN)
+ KASSERT(APIC_IRQ_ISLEGACY(irq));
+
+ int evtch;
+ char evname[16];
+
+ mpih |= APIC_IRQ_LEGACY_IRQ(irq);
+
+ evtch = xen_intr_map((int *)&mpih, type); /* XXX: legacy - xen just tosses irq back at us */
+ if (evtch == -1)
+ return NULL;
+#if NIOAPIC > 0
+ if (ioapic)
+ snprintf(evname, sizeof(evname), "%s pin %d",
+ device_xname(ioapic->sc_dev), pin);
+ else
+#endif
+ snprintf(evname, sizeof(evname), "irq%d", irq);
+
+ aprint_debug("irq: %d requested on pic: %s.\n", irq, pic->pic_name);
+
+ return (void *)pirq_establish(irq, evtch, ih_fun, ih_arg, level,
+ evname);
+#else /* defined(XEN) */
+ return intr_establish_xname(irq, pic, pin, type, level, ih_fun, ih_arg,
+ false, xname);
+#endif
+
+}
+
+/* Deregister an interrupt handler. */
+void
+isa_intr_disestablish(isa_chipset_tag_t ic, void *arg)
+{
+#if !defined(XEN)
+ struct intrhand *ih = arg;
+
+ if (!LEGAL_IRQ(ih->ih_pin))
+ panic("intr_disestablish: bogus irq");
+
+ intr_disestablish(ih);
+#endif
+}
+
+void
+isa_attach_hook(device_t parent, device_t self, struct isabus_attach_args *iba)
+{
+ extern struct x86_isa_chipset x86_isa_chipset;
+ extern int isa_has_been_seen;
+
+ /*
+ * Notify others that might need to know that the ISA bus
+ * has now been attached.
+ */
+ if (isa_has_been_seen)
+ panic("isaattach: ISA bus already seen!");
+ isa_has_been_seen = 1;
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