[src/trunk]: src/sys/arch/arm/arm32 don't use armreg_tlbiasidis_write() and a...

[hsuenaga <hsuenaga%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/6745506e4ea3
branches:  trunk
changeset: 807025:6745506e4ea3
user:      hsuenaga <hsuenaga%NetBSD.org@localhost>
date:      Thu Mar 26 08:45:05 2015 +0000

description:
don't use armreg_tlbiasidis_write() and armreg_icialluis_write()
on single processor platforms.

diffstat:

 sys/arch/arm/arm32/arm32_tlb.c |  10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

diffs (32 lines):

diff -r 5cc2c4ec33e9 -r 6745506e4ea3 sys/arch/arm/arm32/arm32_tlb.c
--- a/sys/arch/arm/arm32/arm32_tlb.c    Thu Mar 26 08:08:27 2015 +0000
+++ b/sys/arch/arm/arm32/arm32_tlb.c    Thu Mar 26 08:45:05 2015 +0000
@@ -30,7 +30,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: arm32_tlb.c,v 1.8 2015/02/07 00:08:34 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: arm32_tlb.c,v 1.9 2015/03/26 08:45:05 hsuenaga Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -93,11 +93,19 @@
        arm_dsb();
        if (arm_has_tlbiasid_p) {
                for (; lo <= hi; lo++) {
+#ifdef MULTIPROCESSOR
                        armreg_tlbiasidis_write(lo);
+#else
+                       armreg_tlbiasid_write(lo);
+#endif
                }
                arm_isb();
                if (__predict_false(vivt_icache_p)) {
+#ifdef MULTIPROCESSOR
                        armreg_icialluis_write(0);
+#else
+                       armreg_iciallu_write(0);
+#endif
                }
        } else {
                armreg_tlbiall_write(0);