Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/netbsd-7]: src Pull up the following, requested by msaitoh in ticket #1628:
details: https://anonhg.NetBSD.org/src/rev/04646f887f2c
branches: netbsd-7
changeset: 800520:04646f887f2c
user: martin <martin%NetBSD.org@localhost>
date: Sat Aug 11 13:34:20 2018 +0000
description:
Pull up the following, requested by msaitoh in ticket #1628:
share/man/man4/wm.4 1.40 via patch
sys/dev/mii/ihphyreg.h 1.2
sys/dev/mii/inbmphyreg.h 1.10
sys/dev/pci/if_wm.c 1.504, 1.506, 1.510-1.535, 1.539-1.540, 1.546, 1.548, 1.551-1.552, 1.558, 1.565-1.573, 1.575, 1.579, 1.582, 1.584 via patch
sys/dev/pci/if_wmreg.h 1.99-1.103, 1.106-1.107 via patch
sys/dev/pci/if_wmvar.h 1.34-1.39 via patch
sys/dev/pci/pcidevs 1.1327 via patch
sys/dev/pci/pcidevs.h regen
sys/dev/pci/pcidevs_data.h regen
sys/dev/pci/pcireg.h patch
Sync wm(4) up to 2018/08/08 except MSI/MSI-X and NET_MPSAFE:
- remove extra "+"
- Fix a bug that non-GMII devices don't send a routing message when
the link status is changed.
- Set WMREG_KABGTXD not in wm_init_locked() but in wm_reset(). Same as
other OSes.
- If a interrupt is a spurious interrupt, don't print debug message.
- Don't print the Image Unique ID if an NVM is iNVM (i210 and I211).
- Print sc_flags with snprintb().
- Fix a bug that a RAL was written at incorrect address when the index
number is more than 16 on 82544 and newer.
- The layout of RAL on PCH* are different from others. Fix it.
- Flush every MTA write. Same as Linux.
- Move the location of calling wm_set_filter. Same as some other OSes.
- Add CSR_WRITE_FLUSH() after writing WMREG_CTRL in
wm_gmii_mediachange().
- Add missing "else" in wm_nvm_release().
- Make new wm_phy_post_reset() and use this function at all location
after resetting phy.
- Move the location of calling wm_get_hw_control. Same as Linux.
- Add I219 specific wokaround for legacy interrupt. From OpenBSD.
- Move the location of calling wm_lplu_d0_disable().
- Fix latency calculation in wm_platform_pm_pch_lpt().
- Set OBFF water mark and enable OBFF on PCH_LPT and newer.
- Disable D0 LPLU on 8257[12356], 82580, I350 and I21[01], too. Before
this commit, above devices and non-PCIe devices accessed wrong
register.
- Use device_printf() instead of aprint_error_dev() for PHY read/write
functions because those are used not only in device attach.
- Fix a bug that wm_gmii_i82544_{read,write}reg() didn't take care of
page select. PHY access from igphy() automatically did it, but
accessing from wm(4) for wrokaround didn't work correctly. This
change affects 8254[17], 8257[12] ICH8, ICH9 and ICH10.
- Call wm_kmrn_lock_loss_workaround_ich8lan() before any PHY access in
wm_linkintr_gmii().
- Register access in wm_kmrn_lock_loss_workaround_ich8lan() now works
correctly. Enable this function.
- Configure the LCD with the extended configuration region in NVM if
it's required.
- If TX is not required to flush, RX is also not required to flush
in wm_flush_desc_rings(). Same as other OSes.
- Remove wrong semaphore access in wm_nvm_{read,write}_{ich8,spt} to
prevent hangup. A semaphore is get/put in wm_nvm_{read,write}.
- Move some initialization stuff in wm_attach() before wm_reset(). Some
flags and callback function are required to set correctly before
wm_reset() because wm_reset() and some helper functions refer them.
- Add wm_write_smbus_addr() to set SMBus address by software.
- Modify wm_gmii_hv_{read,write}reg_locked() to make them access
HV_SMB_ADDR correctly.
- Use new nvm.{acquire,release}() for semaphore.
- Our MII readreg/writereg API has not way to detect an error.
kmrn_{read,write}reg() are not used for MII API, so it's not required
for these functions to use the same API. So,
- Change return value as error code.
- Change register value from int to uint16_t.
- read: pass pointer for uint16_t as an argument.
- Check return value on caller side.
- Check whether it's required to use MDIC workaround for 80003 or not
in wm_reset(). If the workaround isn't required, don't use the
workaround code in wm_gmii_i80003_{read,write}reg.
- Add WM_F_WA_I210_CLSEM flag for a workaround. FreeBSD/Linux drivers
say "In rare circumstances, the SW semaphore may already be held
unintentionally on I21[01]". PXE boot is one of the case.
- Qemu's e1000e emulation (82574L)'s SPI has only 64 words. I've never
seen on real 82574 hardware with such small SPI ROM. Check
sc->sc_nvm_wordsize before accessing higher address words to prevent
timeout.
- Check some wm_nvm_read()'s return vale.
- Print NVM offset and word count when EERD polling failed.
- On I219, drop TARC0 bit 28 for DMA hang workaround (from Linux).
- 82583 supports jumbo frame. Fixes PR#52773 reported by
Shinichi Doyashiki.
- Fix typo in comment. Reported by Shinichi Doyashiki in PR#52885.
- Add ASPM workaround for 8257[1234] and 82583 to prevent device
timeout or hangup. Fixes PR#52818 reported by Shinichi Doyashiki.
- CID-1427779: Fix uninitialized variables.
- Fix a bug that wm_pll_workaround_i210() is not called when
a) Chip is I211 or b) Chip is I210 and it uses iNVM (not FLASH).
- Do wm_reset_mdicnfg_82580() on 82580 only.
- Fix FLASH access on PCH_SPT and newer. Their FLASH access should be
done by 32bit. Especially for ICH_FLASH_HSFCTL register, it's located
at 0x0006, so it must be accessed via ICH_FLASH_HSFSTS(0x0004) and
use shift or mask.
- Make wm_nvm_valid_bank_detect_ich8lan() the same as other OSes.
- If the extended configuration size in the EXTCNFSIZE register is 0,
don't continue in wm_init_lcd_from_nvm().
- Add PCH_CNP support (I219 with Intel 300 series chipset).
- Enable I219 support.
- I354 uses an external PHY, so don't use wm_set_eee_i350().
- Fix a bug that the link can't detect in link interrupt function for
non-SERDES fiber.
- Fix a bug that 82542 misunderstand fiber's signal detection.
- Add debug printf()s.
- Update comment.
- Rename functions and variables.
- Add diagnostic code.
- Sort registers.
- Lowercase hexadecimal values.
- KNF.
diffstat:
share/man/man4/wm.4 | 6 +-
sys/dev/mii/ihphyreg.h | 13 +-
sys/dev/mii/inbmphyreg.h | 4 +-
sys/dev/pci/if_wm.c | 2515 ++++++++++++++++++++++++++++++---------------
sys/dev/pci/if_wmreg.h | 104 +-
sys/dev/pci/if_wmvar.h | 22 +-
sys/dev/pci/pcidevs | 6 +-
sys/dev/pci/pcireg.h | 14 +-
8 files changed, 1761 insertions(+), 923 deletions(-)
diffs (truncated from 5299 to 300 lines):
diff -r 8a8d811557c1 -r 04646f887f2c share/man/man4/wm.4
--- a/share/man/man4/wm.4 Thu Aug 09 14:39:22 2018 +0000
+++ b/share/man/man4/wm.4 Sat Aug 11 13:34:20 2018 +0000
@@ -1,4 +1,4 @@
-.\" $NetBSD: wm.4,v 1.30.2.1 2014/11/07 21:34:56 snj Exp $
+.\" $NetBSD: wm.4,v 1.30.2.2 2018/08/11 13:34:20 martin Exp $
.\"
.\" Copyright 2002, 2003 Wasabi Systems, Inc.
.\" All rights reserved.
@@ -33,7 +33,7 @@
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
.\" POSSIBILITY OF SUCH DAMAGE.
.\"
-.Dd September 3, 2014
+.Dd April 13, 2018
.Dt WM 4
.Os
.Sh NAME
@@ -149,6 +149,8 @@
Intel I211 Ethernet
.It
Intel I217 and I218 Ethernet
+.It
+Intel I219 Ethernet (with Intel [123]00 series chipset)
.El
.Pp
In addition to Intel's own
diff -r 8a8d811557c1 -r 04646f887f2c sys/dev/mii/ihphyreg.h
--- a/sys/dev/mii/ihphyreg.h Thu Aug 09 14:39:22 2018 +0000
+++ b/sys/dev/mii/ihphyreg.h Sat Aug 11 13:34:20 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ihphyreg.h,v 1.1 2010/11/27 20:15:27 christos Exp $ */
+/* $NetBSD: ihphyreg.h,v 1.1.38.1 2018/08/11 13:34:21 martin Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -108,4 +108,15 @@
/* Diagnostics Status Register */
#define IHPHY_MII_DSR BME1000_REG(0, 31)
+/*
+ * XXX I21[789] documents say that the SMBus Address register is at
+ * PHY address 01, Page 0 (not 768), Register 26.
+ */
+#define HV_SMB_ADDR BME1000_REG(768, 26)
+#define HV_SMB_ADDR_ADDR 0x007f
+#define HV_SMB_ADDR_VALID (1 << 7)
+#define HV_SMB_ADDR_FREQ_LOW (1 << 8)
+#define HV_SMB_ADDR_PEC_EN (1 << 9)
+#define HV_SMB_ADDR_FREQ_HIGH (1 << 12)
+
#endif /* _DEV_IHPHY_MIIREG_H_ */
diff -r 8a8d811557c1 -r 04646f887f2c sys/dev/mii/inbmphyreg.h
--- a/sys/dev/mii/inbmphyreg.h Thu Aug 09 14:39:22 2018 +0000
+++ b/sys/dev/mii/inbmphyreg.h Sat Aug 11 13:34:20 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: inbmphyreg.h,v 1.3.30.1 2016/12/12 07:18:29 snj Exp $ */
+/* $NetBSD: inbmphyreg.h,v 1.3.30.2 2018/08/11 13:34:21 martin Exp $ */
/*******************************************************************************
Copyright (c) 2001-2005, Intel Corporation
All rights reserved.
@@ -91,6 +91,8 @@
#define HV_OEM_BITS_A1KDIS (1 << 6)
#define HV_OEM_BITS_ANEGNOW (1 << 10)
+#define HV_LED_CONFIG BME1000_REG(0, 30)
+
#define HV_KMRN_MODE_CTRL BME1000_REG(BM_PORT_CTRL_PAGE, 16)
#define HV_KMRN_MDIO_SLOW 0x0400
diff -r 8a8d811557c1 -r 04646f887f2c sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c Thu Aug 09 14:39:22 2018 +0000
+++ b/sys/dev/pci/if_wm.c Sat Aug 11 13:34:20 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.289.2.14 2017/04/19 17:06:21 snj Exp $ */
+/* $NetBSD: if_wm.c,v 1.289.2.15 2018/08/11 13:34:20 martin Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -84,7 +84,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.289.2.14 2017/04/19 17:06:21 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.289.2.15 2018/08/11 13:34:20 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -126,6 +126,7 @@
#include <dev/mii/igphyreg.h>
#include <dev/mii/igphyvar.h>
#include <dev/mii/inbmphyreg.h>
+#include <dev/mii/ihphyreg.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
@@ -158,7 +159,7 @@
/*
* Transmit descriptor list size. Due to errata, we can only have
* 256 hardware descriptors in the ring on < 82544, but we use 4096
- * on >= 82544. We tell the upper layers that they can queue a lot
+ * on >= 82544. We tell the upper layers that they can queue a lot
* of packets, and we go ahead and manage up to 64 (16 for the i82547)
* of them at a time.
*
@@ -236,9 +237,9 @@
};
/*
- * Software state for receive buffers. Each descriptor gets a
- * 2k (MCLBYTES) buffer and a DMA map. For packets which fill
- * more than one buffer, we chain them together.
+ * Software state for receive buffers. Each descriptor gets a 2k (MCLBYTES)
+ * buffer and a DMA map. For packets which fill more than one buffer, we chain
+ * them together.
*/
struct wm_rxsoft {
struct mbuf *rxs_mbuf; /* head of our mbuf chain */
@@ -266,6 +267,12 @@
int reset_delay_us;
};
+struct wm_nvmop {
+ int (*acquire)(struct wm_softc *);
+ void (*release)(struct wm_softc *);
+ int (*read)(struct wm_softc *, int, int, uint16_t *);
+};
+
/*
* Software state per device.
*/
@@ -426,6 +433,7 @@
kmutex_t *sc_ich_nvmmtx; /* ICH/PCH specific NVM mutex */
struct wm_phyop phy;
+ struct wm_nvmop nvm;
};
#define WM_TX_LOCK(_sc) if ((_sc)->sc_tx_lock) mutex_enter((_sc)->sc_tx_lock)
@@ -569,7 +577,7 @@
#endif
static inline void wm_io_write(struct wm_softc *, int, uint32_t);
static inline void wm_82575_write_8bit_ctlr_reg(struct wm_softc *, uint32_t,
- uint32_t, uint32_t);
+ uint32_t, uint32_t);
static inline void wm_set_dma_addr(volatile wiseman_addr_t *, bus_addr_t);
/*
@@ -598,6 +606,9 @@
static void wm_get_auto_rd_done(struct wm_softc *);
static void wm_lan_init_done(struct wm_softc *);
static void wm_get_cfg_done(struct wm_softc *);
+static void wm_phy_post_reset(struct wm_softc *);
+static void wm_write_smbus_addr(struct wm_softc *);
+static void wm_init_lcd_from_nvm(struct wm_softc *);
static void wm_initialize_hardware_bits(struct wm_softc *);
static uint32_t wm_rxpbs_adjust_82580(uint32_t);
static void wm_reset_phy(struct wm_softc *);
@@ -638,7 +649,7 @@
static void wm_tbi_serdes_set_linkled(struct wm_softc *);
/* GMII related */
static void wm_gmii_reset(struct wm_softc *);
-static void wm_gmii_setup_phytype(struct wm_softc *sc, uint32_t, uint16_t);
+static void wm_gmii_setup_phytype(struct wm_softc *, uint32_t, uint16_t);
static int wm_get_phy_id_82575(struct wm_softc *);
static void wm_gmii_mediainit(struct wm_softc *, pci_product_id_t);
static int wm_gmii_mediachange(struct ifnet *);
@@ -670,15 +681,16 @@
* These functions are not for accessing MII registers but for accessing
* kumeran specific registers.
*/
-static int wm_kmrn_readreg(struct wm_softc *, int);
-static int wm_kmrn_readreg_locked(struct wm_softc *, int);
-static void wm_kmrn_writereg(struct wm_softc *, int, int);
-static void wm_kmrn_writereg_locked(struct wm_softc *, int, int);
+static int wm_kmrn_readreg(struct wm_softc *, int, uint16_t *);
+static int wm_kmrn_readreg_locked(struct wm_softc *, int, uint16_t *);
+static int wm_kmrn_writereg(struct wm_softc *, int, uint16_t);
+static int wm_kmrn_writereg_locked(struct wm_softc *, int, uint16_t);
/* SGMII */
static bool wm_sgmii_uses_mdio(struct wm_softc *);
static int wm_sgmii_readreg(device_t, int, int);
static void wm_sgmii_writereg(device_t, int, int, int);
/* TBI related */
+static bool wm_tbi_havesignal(struct wm_softc *, uint32_t);
static void wm_tbi_mediainit(struct wm_softc *);
static int wm_tbi_mediachange(struct ifnet *);
static void wm_tbi_mediastatus(struct ifnet *, struct ifmediareq *);
@@ -715,7 +727,7 @@
static int32_t wm_ich8_cycle_init(struct wm_softc *);
static int32_t wm_ich8_flash_cycle(struct wm_softc *, uint32_t);
static int32_t wm_read_ich8_data(struct wm_softc *, uint32_t, uint32_t,
- uint32_t *);
+ uint32_t *);
static int32_t wm_read_ich8_byte(struct wm_softc *, uint32_t, uint8_t *);
static int32_t wm_read_ich8_word(struct wm_softc *, uint32_t, uint16_t *);
static int32_t wm_read_ich8_dword(struct wm_softc *, uint32_t, uint32_t *);
@@ -725,10 +737,8 @@
static int wm_nvm_read_word_invm(struct wm_softc *, uint16_t, uint16_t *);
static int wm_nvm_read_invm(struct wm_softc *, int, int, uint16_t *);
/* Lock, detecting NVM type, validate checksum and read */
-static int wm_nvm_acquire(struct wm_softc *);
-static void wm_nvm_release(struct wm_softc *);
static int wm_nvm_is_onboard_eeprom(struct wm_softc *);
-static int wm_nvm_get_flash_presence_i210(struct wm_softc *);
+static int wm_nvm_flash_presence_i210(struct wm_softc *);
static int wm_nvm_validate_checksum(struct wm_softc *);
static void wm_nvm_version_invm(struct wm_softc *);
static void wm_nvm_version(struct wm_softc *);
@@ -740,17 +750,23 @@
*/
static int wm_get_null(struct wm_softc *);
static void wm_put_null(struct wm_softc *);
+static int wm_get_eecd(struct wm_softc *);
+static void wm_put_eecd(struct wm_softc *);
static int wm_get_swsm_semaphore(struct wm_softc *); /* 8257[123] */
static void wm_put_swsm_semaphore(struct wm_softc *);
static int wm_get_swfw_semaphore(struct wm_softc *, uint16_t);
static void wm_put_swfw_semaphore(struct wm_softc *, uint16_t);
+static int wm_get_nvm_80003(struct wm_softc *);
+static void wm_put_nvm_80003(struct wm_softc *);
+static int wm_get_nvm_82571(struct wm_softc *);
+static void wm_put_nvm_82571(struct wm_softc *);
static int wm_get_phy_82575(struct wm_softc *);
static void wm_put_phy_82575(struct wm_softc *);
static int wm_get_swfwhw_semaphore(struct wm_softc *); /* For 574/583 */
static void wm_put_swfwhw_semaphore(struct wm_softc *);
static int wm_get_swflag_ich8lan(struct wm_softc *); /* For PHY */
static void wm_put_swflag_ich8lan(struct wm_softc *);
-static int wm_get_nvm_ich8lan(struct wm_softc *); /* For NVM */
+static int wm_get_nvm_ich8lan(struct wm_softc *);
static void wm_put_nvm_ich8lan(struct wm_softc *);
static int wm_get_hw_semaphore_82573(struct wm_softc *);
static void wm_put_hw_semaphore_82573(struct wm_softc *);
@@ -778,9 +794,9 @@
static void wm_enable_phy_wakeup(struct wm_softc *);
static void wm_igp3_phy_powerdown_workaround_ich8lan(struct wm_softc *);
static void wm_enable_wakeup(struct wm_softc *);
+static void wm_disable_aspm(struct wm_softc *);
/* LPLU (Low Power Link Up) */
static void wm_lplu_d0_disable(struct wm_softc *);
-static void wm_lplu_d0_disable_pch(struct wm_softc *);
/* EEE */
static void wm_set_eee_i350(struct wm_softc *);
@@ -801,6 +817,7 @@
static void wm_toggle_lanphypc_pch_lpt(struct wm_softc *);
static int wm_platform_pm_pch_lpt(struct wm_softc *, bool);
static void wm_pll_workaround_i210(struct wm_softc *);
+static void wm_legacy_irq_quirk_spt(struct wm_softc *);
CFATTACH_DECL3_NEW(wm, sizeof(struct wm_softc),
wm_match, wm_attach, wm_detach, NULL, NULL, NULL, DVF_DETACH_SHUTDOWN);
@@ -1321,7 +1338,6 @@
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_LM3,
"I218 LM Ethernet Connection",
WM_T_PCH_LPT, WMP_F_COPPER },
-#if 0
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V,
"I219 V Ethernet Connection",
WM_T_PCH_SPT, WMP_F_COPPER },
@@ -1349,7 +1365,18 @@
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM5,
"I219 LM Ethernet Connection",
WM_T_PCH_SPT, WMP_F_COPPER },
-#endif
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V6,
+ "I219 V Ethernet Connection",
+ WM_T_PCH_CNP, WMP_F_COPPER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V7,
+ "I219 V Ethernet Connection",
+ WM_T_PCH_CNP, WMP_F_COPPER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM6,
+ "I219 LM Ethernet Connection",
+ WM_T_PCH_CNP, WMP_F_COPPER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM7,
+ "I219 LM Ethernet Connection",
+ WM_T_PCH_CNP, WMP_F_COPPER },
{ 0, 0,
NULL,
0, 0 },
@@ -1468,6 +1495,7 @@
prop_data_t ea;
prop_number_t pn;
uint8_t enaddr[ETHER_ADDR_LEN];
+ char buf[256];
uint16_t cfg1, cfg2, swdpin, nvmword;
pcireg_t preg, memtype;
uint16_t eeprom_data, apme_mask;
@@ -1504,8 +1532,8 @@
sc->sc_type = wmp->wmp_type;
/* Set default function pointers */
- sc->phy.acquire = wm_get_null;
- sc->phy.release = wm_put_null;
+ sc->phy.acquire = sc->nvm.acquire = wm_get_null;
+ sc->phy.release = sc->nvm.release = wm_put_null;
sc->phy.reset_delay_us = (sc->sc_type >= WM_T_82571) ? 100 : 10000;
if (sc->sc_type < WM_T_82543) {
Home |
Main Index |
Thread Index |
Old Index