Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch/arm/cortex Deal with kernel builds where virtualisa...



details:   https://anonhg.NetBSD.org/src/rev/198bc964f014
branches:  trunk
changeset: 812519:198bc964f014
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat Dec 19 13:27:29 2015 +0000

description:
Deal with kernel builds where virtualisation isn't available

diffstat:

 sys/arch/arm/cortex/a9_mpsubr.S |  9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)

diffs (34 lines):

diff -r 967e21b8bb5c -r 198bc964f014 sys/arch/arm/cortex/a9_mpsubr.S
--- a/sys/arch/arm/cortex/a9_mpsubr.S   Sat Dec 19 13:15:21 2015 +0000
+++ b/sys/arch/arm/cortex/a9_mpsubr.S   Sat Dec 19 13:27:29 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: a9_mpsubr.S,v 1.45 2015/12/17 08:02:42 skrll Exp $     */
+/*     $NetBSD: a9_mpsubr.S,v 1.46 2015/12/19 13:27:29 skrll Exp $     */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -347,6 +347,7 @@
 cortex_init:
        mov     r10, lr                         // save lr
 
+#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15) || defined(CPU_CORTEXA17)
        /* Leave HYP mode and move into supervisor mode with IRQs/FIQs disabled. */
        mrs     r0, cpsr
        and     r0, r0, #(PSR_MODE)     /* Mode is in the low 5 bits of CPSR */
@@ -360,11 +361,15 @@
        orr     r0, r0, #(I32_bit | F32_bit)
        msr     spsr_cxsf, r0
        /* Exit hypervisor mode */
-       adr     lr, 1f
+       adr     lr, 2f
        msr     elr_hyp, lr
        eret
+#endif
+
 1:
+       cpsid   if, #PSR_SVC32_MODE             // SVC32 with no interrupts
 
+2:
        mov     r0, #0
        msr     spsr_sxc, r0                    // set SPSR[23:8] to known value
 



Home | Main Index | Thread Index | Old Index