[src/trunk]: src/sys/arch/arm/arm32 Add PMAP_WRITE_COMBINE: to the list of fl...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/64e5259432b3
branches:  trunk
changeset: 829217:64e5259432b3
user:      skrll <skrll%NetBSD.org@localhost>
date:      Mon Jan 22 13:22:40 2018 +0000

description:
Add PMAP_WRITE_COMBINE: to the list of flags supported by pmap_kenter_pa

diffstat:

 sys/arch/arm/arm32/pmap.c |  28 ++++++++++++++++++++--------
 1 files changed, 20 insertions(+), 8 deletions(-)

diffs (49 lines):

diff -r e46ae47e5cf8 -r 64e5259432b3 sys/arch/arm/arm32/pmap.c
--- a/sys/arch/arm/arm32/pmap.c Mon Jan 22 13:21:35 2018 +0000
+++ b/sys/arch/arm/arm32/pmap.c Mon Jan 22 13:22:40 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.363 2018/01/22 13:21:35 skrll Exp $ */
+/*     $NetBSD: pmap.c,v 1.364 2018/01/22 13:22:40 skrll Exp $ */
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -217,7 +217,7 @@
 
 #include <arm/locore.h>
 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.363 2018/01/22 13:21:35 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.364 2018/01/22 13:22:40 skrll Exp $");
 
 //#define PMAP_DEBUG
 #ifdef PMAP_DEBUG
@@ -3704,12 +3704,24 @@
                }
        }
        pmap_release_pmap_lock(kpm);
-
-       pt_entry_t npte = L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot)
-           | ((flags & PMAP_NOCACHE)
-               ? 0
-               : ((flags & PMAP_PTE)
-                   ? pte_l2_s_cache_mode_pt : pte_l2_s_cache_mode));
+       pt_entry_t npte = L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot);
+
+       if (flags & PMAP_PTE) {
+               KASSERT((flags & PMAP_CACHE_MASK) == 0);
+               if (!(flags & PMAP_NOCACHE))
+                       npte |= pte_l2_s_cache_mode_pt;
+       } else {
+               switch (flags & PMAP_CACHE_MASK) {
+               case PMAP_NOCACHE:
+                       break;
+               case PMAP_WRITE_COMBINE:
+                       npte |= pte_l2_s_wc_mode;
+                       break;
+               default:
+                       npte |= pte_l2_s_cache_mode;
+                       break;
+               }
+       }
 #ifdef ARM_MMU_EXTENDED
        if (prot & VM_PROT_EXECUTE)
                npte &= ~L2_XS_XN;