[src/trunk]: src/external/gpl3/gcc/dist/gcc/config/i386 If -march=native is s...

[dsl <dsl%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/adf6c08b5766
branches:  trunk
changeset: 783581:adf6c08b5766
user:      dsl <dsl%NetBSD.org@localhost>
date:      Sun Dec 30 16:13:57 2012 +0000

description:
If -march=native is specified, only enable AVX if the processor supports
  it and the OS has enabled XGETBV for application use.
It might need to also check XCR0[2] (having executed XGETBV) to check that
  the kernel actually supports saving the YMM registers, but I suspect the
  kernel might defer setting that until the first fault.
See vol 1 section 13.5 of the Intel SDM (intel_x86_325462.pdf).
Fixes toolchain/45673

diffstat:

 external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c |  3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diffs (13 lines):

diff -r fd3bb4de5045 -r adf6c08b5766 external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c
--- a/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c      Sun Dec 30 14:56:53 2012 +0000
+++ b/external/gpl3/gcc/dist/gcc/config/i386/driver-i386.c      Sun Dec 30 16:13:57 2012 +0000
@@ -436,7 +436,8 @@
   has_ssse3 = ecx & bit_SSSE3;
   has_sse4_1 = ecx & bit_SSE4_1;
   has_sse4_2 = ecx & bit_SSE4_2;
-  has_avx = ecx & bit_AVX;
+  /* Don't check XCR0[2] - I think that can be 'lazy enabled' by the OS */
+  has_avx = (ecx & bit_AVX) && (ecx & bit_OSXSAVE);
   has_cmpxchg16b = ecx & bit_CMPXCHG16B;
   has_movbe = ecx & bit_MOVBE;
   has_popcnt = ecx & bit_POPCNT;