[src/trunk]: src/sys/arch/arm/include Fix some FPEXC bit definitions

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4e8d985d8c16
branches:  trunk
changeset: 784859:4e8d985d8c16
user:      matt <matt%NetBSD.org@localhost>
date:      Tue Feb 12 00:32:15 2013 +0000

description:
Fix some FPEXC bit definitions

diffstat:

 sys/arch/arm/include/vfpreg.h |  8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diffs (22 lines):

diff -r e4a555fcac8c -r 4e8d985d8c16 sys/arch/arm/include/vfpreg.h
--- a/sys/arch/arm/include/vfpreg.h     Mon Feb 11 23:11:48 2013 +0000
+++ b/sys/arch/arm/include/vfpreg.h     Tue Feb 12 00:32:15 2013 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: vfpreg.h,v 1.6 2012/09/22 19:45:53 matt Exp $ */
+/*      $NetBSD: vfpreg.h,v 1.7 2013/02/12 00:32:15 matt Exp $ */
 
 /*
  * Copyright (c) 2008 ARM Ltd
@@ -69,9 +69,9 @@
 #define VFP_FPEXC_FP2V         0x10000000      /* FPINST2 instruction valid */
 #define VFP_FPEXC_VECITR       0x00000700      /* Vector iteration count */
 #define VFP_FPEXC_INV          0x00000080      /* Input exception flag */
-#define VFP_FPEXC_UFC          0x00000080      /* Potential underflow flag */
-#define VFP_FPEXC_OFC          0x00000080      /* Potential overflow flag */
-#define VFP_FPEXC_IOC          0x00000080      /* Potential inv. op. flag */
+#define VFP_FPEXC_UFC          0x00000008      /* Potential underflow flag */
+#define VFP_FPEXC_OFC          0x00000004      /* Potential overflow flag */
+#define VFP_FPEXC_IOC          0x00000001      /* Potential inv. op. flag */
 
 #define VFP_FPSCR_N    0x80000000      /* set if compare <= result */
 #define VFP_FPSCR_Z    0x40000000      /* set if compare = result */