[src/trunk]: src/sys/arch/powerpc/include add mfspr/mtspr methods suitable fo...

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/23dd8b2687dc
branches:  trunk
changeset: 825295:23dd8b2687dc
user:      macallan <macallan%NetBSD.org@localhost>
date:      Fri Jul 07 22:11:36 2017 +0000

description:
add mfspr/mtspr methods suitable for 64bit SPRs on ppc970 in bridge mode

diffstat:

 sys/arch/powerpc/include/spr.h |  38 +++++++++++++++++++++++++++++++++++++-
 1 files changed, 37 insertions(+), 1 deletions(-)

diffs (57 lines):

diff -r 04086e0b9fd2 -r 23dd8b2687dc sys/arch/powerpc/include/spr.h
--- a/sys/arch/powerpc/include/spr.h    Fri Jul 07 21:40:56 2017 +0000
+++ b/sys/arch/powerpc/include/spr.h    Fri Jul 07 22:11:36 2017 +0000
@@ -1,9 +1,44 @@
-/*     $NetBSD: spr.h,v 1.45 2010/02/25 23:30:04 matt Exp $    */
+/*     $NetBSD: spr.h,v 1.46 2017/07/07 22:11:36 macallan Exp $        */
 
 #ifndef _POWERPC_SPR_H_
 #define        _POWERPC_SPR_H_
 
 #ifndef _LOCORE
+#ifdef PPC_OEA64_BRIDGE
+
+static inline uint64_t
+mfspr(int reg)
+{
+       uint64_t ret;
+       register_t h, l;
+       __asm volatile( "mfspr %0,%2;" \
+                       "srdi %1,%0,32;" \
+                        : "=r"(l), "=r"(h) : "K"(reg));
+       ret = ((uint64_t)h << 32) | l;
+       return ret;
+}
+
+#define mtspr(reg, v) \
+( {                                            \
+       volatile register_t h, l;               \
+       uint64_t val = v;                       \
+       h = (val >> 32);                        \
+       l = val & 0xffffffff;                   \
+       __asm volatile( \
+                       "sldi %2,%2,32;" \
+                       "or %2,%2,%1;" \
+                       "sync;" \
+                       "mtspr %0,%1;" \
+                       "mfspr %1,%0;" \
+                       "mfspr %1,%0;" \
+                       "mfspr %1,%0;" \
+                       "mfspr %1,%0;" \
+                       "mfspr %1,%0;" \
+                       "mfspr %1,%0;" \
+                        : : "K"(reg), "r"(l), "r"(h)); \
+} )
+
+#else
 #define        mtspr(reg, val)                                                 \
        __asm volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
 #ifdef __GNUC__
@@ -12,6 +47,7 @@
          __asm volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
          val; } )
 #endif
+#endif /* PPC_OEA64_BRIDGE */
 #endif /* _LOCORE */
 
 /*