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[src/trunk]: src/sys/rump Implement rumpcomp_sync_icache() hyprecall for mips...
details: https://anonhg.NetBSD.org/src/rev/a2583228d486
branches: trunk
changeset: 797574:a2583228d486
user: alnsn <alnsn%NetBSD.org@localhost>
date: Tue Jul 22 20:25:13 2014 +0000
description:
Implement rumpcomp_sync_icache() hyprecall for mips and add
a barebone implementation if mips cache ops to librumpkern_sljit.
diffstat:
sys/rump/Makefile.rump | 12 ++++-
sys/rump/kern/lib/libsljit/Makefile | 15 ++++++-
sys/rump/kern/lib/libsljit/arch/mips/cache.c | 52 +++++++++++++++++++++++
sys/rump/kern/lib/libsljit/arch/mips/sljit_rump.c | 45 +++++++++++++++++++
sys/rump/kern/lib/libsljit/sljit_rump.h | 29 ++++++++++++
5 files changed, 151 insertions(+), 2 deletions(-)
diffs (192 lines):
diff -r 554d93826365 -r a2583228d486 sys/rump/Makefile.rump
--- a/sys/rump/Makefile.rump Tue Jul 22 20:19:57 2014 +0000
+++ b/sys/rump/Makefile.rump Tue Jul 22 20:25:13 2014 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.rump,v 1.98 2014/06/20 11:57:56 pooka Exp $
+# $NetBSD: Makefile.rump,v 1.99 2014/07/22 20:25:13 alnsn Exp $
#
.if !defined(_RUMP_MK)
@@ -20,6 +20,16 @@
CPPFLAGS+= -D_RUMPKERNEL -I${RUMPTOP}/librump/rumpkern
.endif
+# Define baseline cpu for mips ports, required for
+# rumpcomp_sync_icache() hypercall.
+.if !empty(MACHINE_ARCH:Mmips*)
+.if !empty(MACHINE_ARCH:Mmips64*)
+CPPFLAGS+= -DMIPS64=1
+.else
+CPPFLAGS+= -DMIPS1=1
+.endif
+.endif
+
CPPFLAGS+= -DMAXUSERS=32
CPPFLAGS+= -DCOMPAT_50=1 -DCOMPAT_60=1
diff -r 554d93826365 -r a2583228d486 sys/rump/kern/lib/libsljit/Makefile
--- a/sys/rump/kern/lib/libsljit/Makefile Tue Jul 22 20:19:57 2014 +0000
+++ b/sys/rump/kern/lib/libsljit/Makefile Tue Jul 22 20:25:13 2014 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.1 2013/11/16 01:23:37 rmind Exp $
+# $NetBSD: Makefile,v 1.2 2014/07/22 20:25:13 alnsn Exp $
#
# Public Domain.
#
@@ -10,5 +10,18 @@
SRCS= sljitLir.c sljit_mod.c
+# NOTE This is not the best place for icache sync routine but only
+# sljit uses it at the moment.
+# XXX Think about a good hypercall interface (hi, pooka!) and move
+# this stuff to rumpuser.
+.if !empty(MACHINE_ARCH:Mmips*)
+SRCS+= cache.c
+RUMPCOMP_USER_SRCS= sljit_rump.c
+.PATH: ${.CURDIR}/arch/mips
+
+RUMPCOMP_INCS_DIR:= ${.PARSEDIR}
+RUMPCOMP_USER_CPPFLAGS=-I${RUMPCOMP_INCS_DIR}
+.endif
+
.include <bsd.lib.mk>
.include <bsd.klinks.mk>
diff -r 554d93826365 -r a2583228d486 sys/rump/kern/lib/libsljit/arch/mips/cache.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/rump/kern/lib/libsljit/arch/mips/cache.c Tue Jul 22 20:25:13 2014 +0000
@@ -0,0 +1,52 @@
+/* $NetBSD: cache.c,v 1.1 2014/07/22 20:25:13 alnsn Exp $ */
+
+/*-
+ * Copyright (c) 2014 Alexander Nasonov.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.1 2014/07/22 20:25:13 alnsn Exp $");
+
+/*
+ * Barebone implementation of mips cache routines for rump.
+ */
+
+#include <sys/types.h>
+#include <mips/cache.h>
+
+#include "sljit_rump.h"
+
+static void icache_sync_range(vaddr_t, vsize_t);
+
+struct mips_cache_ops mips_cache_ops = {
+ .mco_icache_sync_range = &icache_sync_range
+};
+
+static void
+icache_sync_range(vaddr_t va, vsize_t sz)
+{
+
+ (void)rumpcomp_sync_icache((void *)va, (uint64_t)sz);
+}
diff -r 554d93826365 -r a2583228d486 sys/rump/kern/lib/libsljit/arch/mips/sljit_rump.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/rump/kern/lib/libsljit/arch/mips/sljit_rump.c Tue Jul 22 20:25:13 2014 +0000
@@ -0,0 +1,45 @@
+/* $NetBSD: sljit_rump.c,v 1.1 2014/07/22 20:25:13 alnsn Exp $ */
+
+/*-
+ * Copyright (c) 2014 Alexander Nasonov.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: sljit_rump.c,v 1.1 2014/07/22 20:25:13 alnsn Exp $");
+
+#ifndef _KERNEL
+
+#include <sys/types.h>
+#include <mips/cachectl.h>
+
+#include "sljit_rump.h"
+
+int
+rumpcomp_sync_icache(void *addr, uint64_t len)
+{
+
+ return _cacheflush(addr, (size_t)len, ICACHE);
+}
+#endif
diff -r 554d93826365 -r a2583228d486 sys/rump/kern/lib/libsljit/sljit_rump.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/rump/kern/lib/libsljit/sljit_rump.h Tue Jul 22 20:25:13 2014 +0000
@@ -0,0 +1,29 @@
+/* $NetBSD: sljit_rump.h,v 1.1 2014/07/22 20:25:13 alnsn Exp $ */
+
+/*-
+ * Copyright (c) 2014 Alexander Nasonov.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+int rumpcomp_sync_icache(void *, uint64_t);
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