[src/trunk]: src/sys/arch/x86/include - Add Hardware-Controlled Performance S...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f15ce2017cbd
branches:  trunk
changeset: 810010:f15ce2017cbd
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Fri Aug 14 06:54:22 2015 +0000

description:
- Add Hardware-Controlled Performance States (HWP) bits.
 - Use __BIT()

diffstat:

 sys/arch/x86/include/specialreg.h |  26 +++++++++++++++++---------
 1 files changed, 17 insertions(+), 9 deletions(-)

diffs (42 lines):

diff -r 0b2f8aa1df33 -r f15ce2017cbd sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Fri Aug 14 06:48:11 2015 +0000
+++ b/sys/arch/x86/include/specialreg.h Fri Aug 14 06:54:22 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: specialreg.h,v 1.82 2015/05/08 07:23:56 msaitoh Exp $  */
+/*     $NetBSD: specialreg.h,v 1.83 2015/08/14 06:54:22 msaitoh Exp $  */
 
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
@@ -279,16 +279,24 @@
  * Intel Digital Thermal Sensor and
  * Power Management, Fn0000_0006 - %eax.
  */
-#define CPUID_DSPM_DTS 0x00000001      /* Digital Thermal Sensor */
-#define CPUID_DSPM_IDA 0x00000002      /* Intel Dynamic Acceleration */
-#define CPUID_DSPM_ARAT        0x00000004      /* Always Running APIC Timer */
-#define CPUID_DSPM_PLN 0x00000010      /* Power Limit Notification */
-#define CPUID_DSPM_CME 0x00000020      /* Clock Modulation Extension */
-#define CPUID_DSPM_PLTM        0x00000040      /* Package Level Thermal Management */
+#define CPUID_DSPM_DTS __BIT(0)        /* Digital Thermal Sensor */
+#define CPUID_DSPM_IDA __BIT(1)        /* Intel Dynamic Acceleration */
+#define CPUID_DSPM_ARAT        __BIT(2)        /* Always Running APIC Timer */
+#define CPUID_DSPM_PLN __BIT(4)        /* Power Limit Notification */
+#define CPUID_DSPM_ECMD        __BIT(5)        /* Clock Modulation Extension */
+#define CPUID_DSPM_PTM __BIT(6)        /* Package Level Thermal Management */
+#define CPUID_DSPM_HWP __BIT(7)        /* HWP */
+#define CPUID_DSPM_HWP_NOTIFY __BIT(8) /* HWP Notification */
+#define CPUID_DSPM_HWP_ACTWIN  __BIT(9)        /* HWP Activity Window */
+#define CPUID_DSPM_HWP_EPP __BIT(10)   /* HWP Energy Performance Preference */
+#define CPUID_DSPM_HWP_PLR __BIT(11)   /* HWP Package Level Request */
+#define CPUID_DSPM_HDC __BIT(13)       /* HDC */
 
 #define CPUID_DSPM_FLAGS       "\20" \
-       "\1" "DTS"      "\2" "IDA"      "\3" "ARAT" \
-       "\5" "PLN"      "\6" "CME"      "\7" "PLTM"
+       "\1" "DTS"      "\2" "IDA"      "\3" "ARAT"                     \
+       "\5" "PLN"      "\6" "ECMD"     "\7" "PTM"      "\10" "HWP"     \
+       "\11" "HWP_NOTIFY" "\12" "HWP_ACTWIN" "\13" "HWP_EPP" "\14" "HWP_PLR" \
+                       "\16" "HDC"
 
 /*
  * Intel Digital Thermal Sensor and