[src/khorben-n900]: src/sys/arch/arm/pic Allow interrupt handlers to be tempo...

[khorben <khorben%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/52f9a8f250e4
branches:  khorben-n900
changeset: 786694:52f9a8f250e4
user:      khorben <khorben%NetBSD.org@localhost>
date:      Fri May 10 00:57:56 2013 +0000

description:
Allow interrupt handlers to be temporarily disabled or enabled again,
including from within interrupt context: returning non-zero keeps the
handler enabled (as previously), while returning zero disables the
interrupt until a call to intr_enable().

This is necessary with the TPS65950 companion chip because:
- it interrupts on the main code (via IRQ_SYS_nIRQ0)
- interrupt handling requires I2C traffic (to access registers)
- interrupt-based interaction is necessary with this chip (keypad, GPIO...)

XXX Affects other ARM devices using the ARM PIC code, additional code
    review is required to address them.

diffstat:

 sys/arch/arm/pic/pic.c    |  38 +++++++++++++++++++++++++++++++-------
 sys/arch/arm/pic/picvar.h |   6 ++++--
 2 files changed, 35 insertions(+), 9 deletions(-)

diffs (128 lines):

diff -r 6d8e73c7866e -r 52f9a8f250e4 sys/arch/arm/pic/pic.c
--- a/sys/arch/arm/pic/pic.c    Fri May 10 00:50:34 2013 +0000
+++ b/sys/arch/arm/pic/pic.c    Fri May 10 00:57:56 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pic.c,v 1.15 2012/10/30 07:42:35 msaitoh Exp $ */
+/*     $NetBSD: pic.c,v 1.15.6.1 2013/05/10 00:57:56 khorben Exp $     */
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -28,7 +28,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.15 2012/10/30 07:42:35 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.15.6.1 2013/05/10 00:57:56 khorben Exp $");
 
 #define _INTR_PRIVATE
 #include <sys/param.h>
@@ -201,7 +201,7 @@
                return ipl_mask;
 
        KASSERT((irq_base & 31) == 0);
-       
+
        (*pic->pic_ops->pic_block_irqs)(pic, irq_base, pending);
 
        atomic_or_32(ipending, pending);
@@ -252,7 +252,7 @@
        }
 }
 
-void
+int
 pic_dispatch(struct intrsource *is, void *frame)
 {
        int rv;
@@ -265,13 +265,15 @@
                rv = (*is->is_func)(is->is_arg);
        } else {
                pic_deferral_ev.ev_count++;
-               return;
+               return 1;
        }
 
        struct pic_percpu * const pcpu = percpu_getref(is->is_pic->pic_percpu);
        KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
        pcpu->pcpu_evs[is->is_irq].ev_count++;
        percpu_putref(is->is_pic->pic_percpu);
+
+       return rv;
 }
 
 void
@@ -290,6 +292,7 @@
        uint32_t blocked_irqs;
        int irq;
        bool progress = false;
+       int rv;
        
        KASSERT(pic->pic_pending_ipls & ipl_mask);
 
@@ -336,7 +339,7 @@
                        is = pic->pic_sources[irq_base + irq];
                        if (is != NULL) {
                                cpsie(I32_bit);
-                               pic_dispatch(is, frame);
+                               rv = pic_dispatch(is, frame);
                                cpsid(I32_bit);
 #if PIC_MAXSOURCES > 32
                                /*
@@ -345,7 +348,8 @@
                                 */
                                poi = 1;
 #endif
-                               blocked_irqs |= __BIT(irq);
+                               if (rv)
+                                       blocked_irqs |= __BIT(irq);
                        } else {
                                KASSERT(0);
                        }
@@ -725,3 +729,23 @@
 
        pic_disestablish_source(is);
 }
+
+void
+intr_enable(void *ih)
+{
+       const struct intrsource const *is = ih;
+       struct pic_softc * const pic = is->is_pic;
+       const int irq = is->is_irq;
+
+       (*pic->pic_ops->pic_unblock_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
+}
+
+void
+intr_disable(void *ih)
+{
+       const struct intrsource * const is = ih;
+       struct pic_softc * const pic = is->is_pic;
+       const int irq = is->is_irq;
+
+       (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
+}
diff -r 6d8e73c7866e -r 52f9a8f250e4 sys/arch/arm/pic/picvar.h
--- a/sys/arch/arm/pic/picvar.h Fri May 10 00:50:34 2013 +0000
+++ b/sys/arch/arm/pic/picvar.h Fri May 10 00:57:56 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: picvar.h,v 1.7 2012/09/01 00:00:42 matt Exp $  */
+/*     $NetBSD: picvar.h,v 1.7.8.1 2013/05/10 00:57:56 khorben Exp $   */
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -64,11 +64,13 @@
 int    pic_alloc_irq(struct pic_softc *pic);
 void   pic_disestablish_source(struct intrsource *is);
 void   pic_do_pending_ints(register_t psw, int newipl, void *frame);
-void   pic_dispatch(struct intrsource *is, void *frame);
+int    pic_dispatch(struct intrsource *is, void *frame);
 
 void   *intr_establish(int irq, int ipl, int type, int (*func)(void *),
            void *arg);
 void   intr_disestablish(void *);
+void   intr_enable(void *);
+void   intr_disable(void *);
 #ifdef MULTIPROCESSOR
 void   intr_cpu_init(struct cpu_info *);
 void   intr_ipi_send(const kcpuset_t *, u_long ipi);