[src/trunk]: src/sys/dev/mii Remove extra 10ms delay in ihphy_reset(). The de...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ffea4b5a3eb7
branches:  trunk
changeset: 846488:ffea4b5a3eb7
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Mon Nov 18 15:09:58 2019 +0000

description:
Remove extra 10ms delay in ihphy_reset(). The delay are in if_wm.c side.
It's required for hardware full reset and it't not requred on soft reset.
 When ihphy.c was added in 9 years ago, some workaround code were not in
if_wm.c yet and the initialization code was not good.

diffstat:

 sys/dev/mii/ihphy.c |  12 ++----------
 1 files changed, 2 insertions(+), 10 deletions(-)

diffs (33 lines):

diff -r 6d991a54f443 -r ffea4b5a3eb7 sys/dev/mii/ihphy.c
--- a/sys/dev/mii/ihphy.c       Mon Nov 18 14:53:34 2019 +0000
+++ b/sys/dev/mii/ihphy.c       Mon Nov 18 15:09:58 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $       */
+/*     $NetBSD: ihphy.c,v 1.15 2019/11/18 15:09:58 msaitoh Exp $       */
 
 /*-
  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
@@ -60,7 +60,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.15 2019/11/18 15:09:58 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -291,14 +291,6 @@
 
        PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
 
-       /*
-        * Regarding reset, the data sheet specifies (page 55):
-        *
-        * "After PHY reset, a delay of 10 ms is required before
-        *  any register access using MDIO."
-        */
-       delay(10000);
-
        /* Wait another 100ms for it to complete. */
        for (i = 0; i < 100; i++) {
                PHY_READ(sc, MII_BMCR, &reg);