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[src/trunk]: src/sys/dev/pci Set BGE_MISC_CTL's byte/word swap options before...



details:   https://anonhg.NetBSD.org/src/rev/abbc5a0f9117
branches:  trunk
changeset: 786816:abbc5a0f9117
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Mon May 13 17:08:20 2013 +0000

description:
Set BGE_MISC_CTL's byte/word swap options before using bge_readmem_ind().
Fixes PR#47716.

 Re-enable NVRAM lock stuff again (i.e. revert rev. 1.233).

diffstat:

 sys/dev/pci/if_bge.c |  15 +++++++++------
 1 files changed, 9 insertions(+), 6 deletions(-)

diffs (64 lines):

diff -r 678000abc622 -r abbc5a0f9117 sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c      Mon May 13 16:01:31 2013 +0000
+++ b/sys/dev/pci/if_bge.c      Mon May 13 17:08:20 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bge.c,v 1.242 2013/05/10 16:37:10 christos Exp $    */
+/*     $NetBSD: if_bge.c,v 1.243 2013/05/13 17:08:20 msaitoh Exp $     */
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.242 2013/05/10 16:37:10 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.243 2013/05/13 17:08:20 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -3591,6 +3591,12 @@
                }
        }
 
+       /* 5718 reset step 5, 57XX step 5b-5d */
+       /* Set swap options before using bge_readmem_ind() */
+       pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_MISC_CTL,
+           BGE_PCIMISCCTL_INDIRECT_ACCESS | BGE_PCIMISCCTL_MASK_PCI_INTR |
+           BGE_HIF_SWAP_OPTIONS | BGE_PCIMISCCTL_PCISTATE_RW);
+
        /*
         * Read the hardware config word in the first 32k of NIC internal
         * memory, or fall back to the config word in the EEPROM.
@@ -3618,7 +3624,6 @@
        aprint_normal_dev(sc->bge_dev, "HW config %08x, %08x, %08x, %08x\n",
            hwcfg, hwcfg2, hwcfg3, hwcfg4);
 
-#if 0
        /*
         * Reset NVRAM before bge_reset(). It's required to acquire NVRAM
         * lock in bge_reset().
@@ -3627,7 +3632,6 @@
            BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
        delay(1000);
        BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
-#endif
 
        bge_stop_fw(sc);
        bge_sig_pre_reset(sc, BGE_RESET_START);
@@ -3973,7 +3977,6 @@
        } else
                write_op = bge_writereg_ind;
 
-#if 0
        /* 57XX step 4 */
        /* Acquire the NVM lock */
        if ((sc->bge_flags & BGE_NO_EEPROM) == 0 &&
@@ -3991,7 +3994,7 @@
                            device_xname(sc->bge_dev));
                }
        }
-#endif
+
        /* Take APE lock when performing reset. */
        bge_ape_lock(sc, BGE_APE_LOCK_GRC);
 



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