[src/trunk]: src/sys/external/bsd/drm2/dist/drm/i915 Back-port attempt [1/2] ...

[riastradh <riastradh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/91bf188af428
branches:  trunk
changeset: 806449:91bf188af428
user:      riastradh <riastradh%NetBSD.org@localhost>
date:      Wed Feb 25 13:30:02 2015 +0000

description:
Back-port attempt [1/2] to fix i915drmkms on G4X, from Linux.

commit ece4a17d237a79f63fbfaf3f724a12b6d500555c
Author: Jiri Kosina <jkosina%suse.cz@localhost>
Date:   Thu Aug 7 16:29:53 2014 +0200

    drm/i915: read HEAD register back in init_ring_common() to enforce ordering

    Withtout this, ring initialization fails reliabily during resume with

        [drm:init_ring_common] *ERROR* render ring initialization failed ctl 000
1f001 head ffffff8804 tail 00000000 start 000e4000

    This is not a complete fix, but it is verified to make the ring
    initialization failures during resume much less likely.

    We were not able to root-cause this bug (likely HW-specific to Gen4 chips)
    yet. This is therefore used as a ducttape before problem is fully
    understood and proper fix created, so that people don't suffer from
    completely unusable systems in the meantime.

    The discussion and debugging is happening at

        https://bugs.freedesktop.org/show_bug.cgi?id=76554

diffstat:

 sys/external/bsd/drm2/dist/drm/i915/intel_ringbuffer.c |  3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diffs (13 lines):

diff -r 61dffb4bd46f -r 91bf188af428 sys/external/bsd/drm2/dist/drm/i915/intel_ringbuffer.c
--- a/sys/external/bsd/drm2/dist/drm/i915/intel_ringbuffer.c    Wed Feb 25 13:20:05 2015 +0000
+++ b/sys/external/bsd/drm2/dist/drm/i915/intel_ringbuffer.c    Wed Feb 25 13:30:02 2015 +0000
@@ -499,6 +499,9 @@
        else
                ring_setup_phys_status_page(ring);
 
+       /* Enforce ordering by reading HEAD register back */
+       I915_READ_HEAD(ring);
+
        /* Initialize the ring. This must happen _after_ we've cleared the ring
         * registers with the above sequence (the readback of the HEAD registers
         * also enforces ordering), otherwise the hw might lose the new ring