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[src/trunk]: src/sys/dev/sdmmc add SDHC_FLAG_NO_HS_BIT flag to prevent sdhc d...
details: https://anonhg.NetBSD.org/src/rev/0c445b35c892
branches: trunk
changeset: 783851:0c445b35c892
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Thu Jan 10 17:19:33 2013 +0000
description:
add SDHC_FLAG_NO_HS_BIT flag to prevent sdhc driver from setting the SDHC_HIGH_SPEED bit in SDHC_HOST_CTL, required to get many high speed cards working on rpi
diffstat:
sys/dev/sdmmc/sdhc.c | 7 ++++---
sys/dev/sdmmc/sdhcvar.h | 3 ++-
2 files changed, 6 insertions(+), 4 deletions(-)
diffs (45 lines):
diff -r bdf4cb0acd89 -r 0c445b35c892 sys/dev/sdmmc/sdhc.c
--- a/sys/dev/sdmmc/sdhc.c Thu Jan 10 16:20:11 2013 +0000
+++ b/sys/dev/sdmmc/sdhc.c Thu Jan 10 17:19:33 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc.c,v 1.42 2013/01/08 19:36:38 jakllsch Exp $ */
+/* $NetBSD: sdhc.c,v 1.43 2013/01/10 17:19:33 jmcneill Exp $ */
/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
/*
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.42 2013/01/08 19:36:38 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.43 2013/01/10 17:19:33 jmcneill Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -949,7 +949,8 @@
*/
HSET2(hp, SDHC_CLOCK_CTL, SDHC_SDCLK_ENABLE);
- if (freq > 25000)
+ if (freq > 25000 &&
+ !ISSET(hp->sc->sc_flags, SDHC_FLAG_NO_HS_BIT))
HSET1(hp, SDHC_HOST_CTL, SDHC_HIGH_SPEED);
else
HCLR1(hp, SDHC_HOST_CTL, SDHC_HIGH_SPEED);
diff -r bdf4cb0acd89 -r 0c445b35c892 sys/dev/sdmmc/sdhcvar.h
--- a/sys/dev/sdmmc/sdhcvar.h Thu Jan 10 16:20:11 2013 +0000
+++ b/sys/dev/sdmmc/sdhcvar.h Thu Jan 10 17:19:33 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhcvar.h,v 1.12 2012/12/20 14:37:00 jakllsch Exp $ */
+/* $NetBSD: sdhcvar.h,v 1.13 2013/01/10 17:19:33 jmcneill Exp $ */
/* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */
/*
@@ -48,6 +48,7 @@
#define SDHC_FLAG_RSP136_CRC 0x0400 /* Resp 136 with CRC and end-bit */
#define SDHC_FLAG_SINGLE_ONLY 0x0800 /* Single transfer only */
#define SDHC_FLAG_WAIT_RESET 0x1000 /* Wait for soft resets to start */
+#define SDHC_FLAG_NO_HS_BIT 0x2000 /* Don't set SDHC_HIGH_SPEED bit */
uint32_t sc_clkbase;
int sc_clkmsk; /* Mask for SDCLK */
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