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[src/trunk]: src/sys/arch/alpha Add support for AlphaStation DS15.
details: https://anonhg.NetBSD.org/src/rev/a3b7e7fa83e3
branches: trunk
changeset: 790169:a3b7e7fa83e3
user: tsutsui <tsutsui%NetBSD.org@localhost>
date: Mon Sep 23 16:41:56 2013 +0000
description:
Add support for AlphaStation DS15.
Ported from OpenBSD via PR port-alpha/48148 by nullnilaki.
Note support for the secondary PCI bus still needs more improvements.
diffstat:
sys/arch/alpha/alpha/cpuconf.c | 5 +-
sys/arch/alpha/pci/tsc.c | 62 ++++++++++++++++++++++++++++++---------
sys/arch/alpha/pci/tsp_dma.c | 22 +++++++++----
sys/arch/alpha/pci/tsreg.h | 64 ++++++++++++++++++++++++++++++++++-------
sys/arch/alpha/pci/tsvar.h | 3 +-
5 files changed, 120 insertions(+), 36 deletions(-)
diffs (truncated from 322 to 300 lines):
diff -r 0a942f4057ba -r a3b7e7fa83e3 sys/arch/alpha/alpha/cpuconf.c
--- a/sys/arch/alpha/alpha/cpuconf.c Mon Sep 23 15:30:32 2013 +0000
+++ b/sys/arch/alpha/alpha/cpuconf.c Mon Sep 23 16:41:56 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuconf.c,v 1.35 2012/02/06 02:14:10 matt Exp $ */
+/* $NetBSD: cpuconf.c,v 1.36 2013/09/23 16:41:56 tsutsui Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -60,7 +60,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpuconf.c,v 1.35 2012/02/06 02:14:10 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpuconf.c,v 1.36 2013/09/23 16:41:56 tsutsui Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -233,6 +233,7 @@
cpu_notsupp(ST_DEC_EV56_PBP, "EV56 Passive Backplane Board"),
cpu_notsupp(ST_DEC_ALPHAVME_320, "AlphaVME 320"),
cpu_init(ST_DEC_6600, dec_6600_init, "DEC_6600"),
+ cpu_init(ST_DEC_TITAN, dec_6600_init, "DEC_6600"),
cpu_init(ST_API_NAUTILUS, api_up1000_init, "API_UP1000"),
};
static const int ncpuinit = (sizeof(cpuinit) / sizeof(cpuinit[0]));
diff -r 0a942f4057ba -r a3b7e7fa83e3 sys/arch/alpha/pci/tsc.c
--- a/sys/arch/alpha/pci/tsc.c Mon Sep 23 15:30:32 2013 +0000
+++ b/sys/arch/alpha/pci/tsc.c Mon Sep 23 16:41:56 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tsc.c,v 1.19 2011/05/17 17:34:47 dyoung Exp $ */
+/* $NetBSD: tsc.c,v 1.20 2013/09/23 16:41:57 tsutsui Exp $ */
/*-
* Copyright (c) 1999 by Ross Harvey. All rights reserved.
@@ -35,7 +35,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.19 2011/05/17 17:34:47 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.20 2013/09/23 16:41:57 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -66,7 +66,7 @@
extern struct cfdriver tsc_cd;
-struct tsp_config tsp_configuration[2];
+struct tsp_config tsp_configuration[4];
static int tscprint(void *, const char *pnp);
@@ -91,9 +91,13 @@
{
struct mainbus_attach_args *ma = aux;
- return cputype == ST_DEC_6600
- && strcmp(ma->ma_name, tsc_cd.cd_name) == 0
- && !tscfound;
+ switch (cputype) {
+ case ST_DEC_6600:
+ case ST_DEC_TITAN:
+ return strcmp(ma->ma_name, tsc_cd.cd_name) == 0 && !tscfound;
+ default:
+ return 0;
+ }
}
static void
@@ -104,15 +108,16 @@
uint64_t csc, aar;
struct tsp_attach_args tsp;
struct mainbus_attach_args *ma = aux;
+ int titan = cputype == ST_DEC_TITAN;
tscfound = 1;
csc = LDQP(TS_C_CSC);
nbus = 1 + (CSC_BC(csc) >= 2);
- printf(": 21272 Core Logic Chipset, Cchip rev %d\n"
+ printf(": 2127%c Core Logic Chipset, Cchip rev %d\n"
"%s%d: %c Dchips, %d memory bus%s of %d bytes\n",
- (int)MISC_REV(LDQP(TS_C_MISC)),
+ titan ? '4' : '2', (int)MISC_REV(LDQP(TS_C_MISC)),
ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)],
nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0));
printf("%s%d: arrays present: ", ma->ma_name, ma->ma_slot);
@@ -125,11 +130,21 @@
memset(&tsp, 0, sizeof tsp);
tsp.tsp_name = "tsp";
- config_found(self, &tsp, NULL);
+ tsp.tsp_slot = 0;
+
+ config_found(self, &tsp, tscprint);
+ if (titan) {
+ tsp.tsp_slot += 2;
+ config_found(self, &tsp, tscprint);
+ }
- if(LDQP(TS_C_CSC) & CSC_P1P) {
- ++tsp.tsp_slot;
+ if (csc & CSC_P1P) {
+ tsp.tsp_slot = 1;
config_found(self, &tsp, tscprint);
+ if (titan) {
+ tsp.tsp_slot += 2;
+ config_found(self, &tsp, tscprint);
+ }
}
}
@@ -150,8 +165,13 @@
{
struct tsp_attach_args *t = aux;
- return cputype == ST_DEC_6600
- && strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
+ switch (cputype) {
+ case ST_DEC_6600:
+ case ST_DEC_TITAN:
+ return strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
+ default:
+ return 0;
+ }
}
static void
@@ -193,12 +213,24 @@
/* n: Pchip number */
{
struct tsp_config *pcp;
+ int titan = cputype == ST_DEC_TITAN;
- KASSERT((n | 1) == 1);
+ KASSERT(n >= 0 && n < __arraycount(tsp_configuration));
pcp = &tsp_configuration[n];
pcp->pc_pslot = n;
pcp->pc_iobase = TS_Pn(n, 0);
- pcp->pc_csr = S_PAGE(TS_Pn(n, P_CSRBASE));
+ pcp->pc_csr = S_PAGE(TS_Pn(n & 1, P_CSRBASE));
+ if (n & 2) {
+ /* `A' port of PA Chip */
+ pcp->pc_csr++;
+ }
+ if (titan) {
+ /* same address on G and A ports */
+ pcp->pc_tlbia = &pcp->pc_csr->port.g.tsp_tlbia.tsg_r;
+ } else {
+ pcp->pc_tlbia = &pcp->pc_csr->port.p.tsp_tlbia.tsg_r;
+ }
+
if (!pcp->pc_initted) {
tsp_bus_io_init(&pcp->pc_iot, pcp);
tsp_bus_mem_init(&pcp->pc_memt, pcp);
diff -r 0a942f4057ba -r a3b7e7fa83e3 sys/arch/alpha/pci/tsp_dma.c
--- a/sys/arch/alpha/pci/tsp_dma.c Mon Sep 23 15:30:32 2013 +0000
+++ b/sys/arch/alpha/pci/tsp_dma.c Mon Sep 23 16:41:56 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tsp_dma.c,v 1.12 2012/02/06 02:14:15 matt Exp $ */
+/* $NetBSD: tsp_dma.c,v 1.13 2013/09/23 16:41:57 tsutsui Exp $ */
/*-
* Copyright (c) 1999 by Ross Harvey. All rights reserved.
@@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tsp_dma.c,v 1.12 2012/02/06 02:14:15 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsp_dma.c,v 1.13 2013/09/23 16:41:57 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -118,10 +118,10 @@
static struct map_expected {
uint32_t base, mask, enables;
} premap[4] = {
- { 0x800000, 0x700000, WSBA_ENA | WSBA_SG },
- { 0x80000000 | WSBA_ENA, 0x3ff00000, WSBA_ENA },
- { 0, 0 },
- { 0, 0 }
+ { 0x00800000, 0x00700000, WSBA_ENA | WSBA_SG },
+ { 0x80000000, 0x3ff00000, WSBA_ENA },
+ { 0, 0, 0 },
+ { 0, 0, 0 }
};
alpha_mb();
@@ -207,6 +207,14 @@
alpha_mb();
/*
+ * Enable window 1 in direct mode.
+ */
+ alpha_mb();
+ pccsr->tsp_wsba[1].tsg_r =
+ (pccsr->tsp_wsba[1].tsg_r & ~WSBA_SG) | WSBA_ENA;
+ alpha_mb();
+
+ /*
* Check windows for sanity, especially if we later decide to
* use the firmware's initialization in some cases.
*/
@@ -354,6 +362,6 @@
{
alpha_mb();
- pcp->pc_csr->tsp_tlbia.tsg_r = 0;
+ *pcp->pc_tlbia = 0;
alpha_mb();
}
diff -r 0a942f4057ba -r a3b7e7fa83e3 sys/arch/alpha/pci/tsreg.h
--- a/sys/arch/alpha/pci/tsreg.h Mon Sep 23 15:30:32 2013 +0000
+++ b/sys/arch/alpha/pci/tsreg.h Mon Sep 23 16:41:56 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tsreg.h,v 1.5 2012/02/06 02:14:15 matt Exp $ */
+/* $NetBSD: tsreg.h,v 1.6 2013/09/23 16:41:57 tsutsui Exp $ */
/*-
* Copyright (c) 1999 by Ross Harvey. All rights reserved.
@@ -186,7 +186,7 @@
*/
#define P_CSRBASE 0x001##8000##0000UL
-#define P_PCI_MEM 0
+#define P_PCI_MEM 0x800##0000##0000UL
#define P_PCI_IO 0x001##fc00##0000UL
#define P_PCI_CONFIG 0x001##fe00##0000UL
@@ -209,15 +209,7 @@
/*
* Tsunami Pchip
*/
-struct ts_pchip {
- TS_GR tsp_wsba[4]; /* Window Space Base Address */
-
- TS_GR tsp_wsm[4]; /* Window Space Mask */
-
- TS_GR tsp_tba[4]; /* Translated Base Address */
-
- TS_GR tsp_pctl; /* Pchip Control */
- TS_GR tsp_plat; /* Pchip Latency */
+struct ts_pport {
TS_GR tsp_resA;
TS_GR tsp_error; /* Pchip Error */
@@ -232,6 +224,56 @@
TS_GR tsp_resC;
TS_GR tsp_resD_K[8];
+};
+
+struct ts_gport {
+ TS_GR tsp_resA[2];
+ TS_GR tsp_serror;
+ TS_GR tsp_serrmask;
+ TS_GR tsp_serrset;
+ TS_GR tsp_resB;
+ TS_GR tsp_gperrmask;
+ TS_GR tsp_gperren;
+ TS_GR tsp_gperrset;
+ TS_GR tsp_resC;
+ TS_GR tsp_tlbiv;
+ TS_GR tsp_tlbia;
+ TS_GR tsp_resD[2];
+ TS_GR tsp_sctl;
+ TS_GR tsp_resE[3];
+};
+
+struct ts_aport {
+ TS_GR tsp_resA[2];
+ TS_GR tsp_agperror;
+ TS_GR tsp_agperrmask;
+ TS_GR tsp_agperrset;
+ TS_GR tsp_agplastwr;
+ TS_GR tsp_aperror;
+ TS_GR tsp_aperrmask;
+ TS_GR tsp_aperrset;
+ TS_GR tsp_resB;
+ TS_GR tsp_tlbiv;
+ TS_GR tsp_tlbia;
+ TS_GR tsp_resC[6];
+};
+
+struct ts_pchip {
+ TS_GR tsp_wsba[4]; /* Window Space Base Address */
+
+ TS_GR tsp_wsm[4]; /* Window Space Mask */
+
+ TS_GR tsp_tba[4]; /* Translated Base Address */
+
+ TS_GR tsp_pctl; /* Pchip Control */
+ TS_GR tsp_plat; /* Pchip Latency */
+
+ union {
+ struct ts_pport p;
+ struct ts_gport g;
+ struct ts_aport a;
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