[src/trunk]: src/sys/arch/arm/imx fixed register size

[hkenken <hkenken%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9ce104ca8f24
branches:  trunk
changeset: 808136:9ce104ca8f24
user:      hkenken <hkenken%NetBSD.org@localhost>
date:      Thu May 07 04:37:29 2015 +0000

description:
fixed register size

diffstat:

 sys/arch/arm/imx/imx51reg.h |  12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diffs (53 lines):

diff -r 8c4696ce9a5c -r 9ce104ca8f24 sys/arch/arm/imx/imx51reg.h
--- a/sys/arch/arm/imx/imx51reg.h       Thu May 07 04:13:47 2015 +0000
+++ b/sys/arch/arm/imx/imx51reg.h       Thu May 07 04:37:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: imx51reg.h,v 1.6 2015/03/27 05:31:23 hkenken Exp $ */
+/* $NetBSD: imx51reg.h,v 1.7 2015/05/07 04:37:29 hkenken Exp $ */
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -126,7 +126,7 @@
 #define        ESDHC2_BASE     (AIPSTZ1_BASE + 0x00008000)
 #define        ESDHC3_BASE     (AIPSTZ1_BASE + 0x00020000)
 #define        ESDHC4_BASE     (AIPSTZ1_BASE + 0x00024000)
-#define        ESDHC_SIZE      0x100
+#define        ESDHC_SIZE      0x4000
 
 #define PWM1_BASE      (AIPSTZ1_BASE + 0x03fb4000)
 #define PWM2_BASE      (AIPSTZ1_BASE + 0x03fb8000)
@@ -239,7 +239,7 @@
 #define         USB_CLKONOFF_CTRL_H1_AHBCLK_OFF        __BIT(18)
 #define         USB_CLKONOFF_CTRL_OTG_AHBCLK_OFF       __BIT(17)
 
-#define        USBOH3_SIZE     0x828
+#define        USBOH3_SIZE     0x4000
 
 /* GPIO module */
 
@@ -266,7 +266,7 @@
 
 #define        WDOG1_BASE      (AIPSTZ1_BASE + 0x03f98000)
 #define        WDOG2_BASE      (AIPSTZ1_BASE + 0x03f9c000)
-#define        WDOG_SIZE       0x000a
+#define        WDOG_SIZE       0x4000
 
 #define        GPT_BASE        (AIPSTZ1_BASE + 0x03fa0000)
 #define        GPT_SIZE        0x4000
@@ -342,7 +342,7 @@
 #define        SRC_SIZE        0x4000
 
 #define        CCM_BASE        (AIPSTZ1_BASE + 0x03fd4000)
-#define        CCM_SIZE        0x0088
+#define        CCM_SIZE        0x4000
 
 #define        GPC_BASE        (AIPSTZ1_BASE + 0x03fd8000)
 #define        GPC_SIZE        0x4000
@@ -419,6 +419,6 @@
 #define        SAHARA_SIZE     0x4000
 
 #define        DPLL_BASE(n)    ((AIPSTZ2_BASE + 0x03F80000 + (0x4000 * ((n)-1))))
-#define        DPLL_SIZE       0x100
+#define        DPLL_SIZE       0x4000
 
 #endif /* _ARM_IMX_IMX51REG_H_ */