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[src/trunk]: src/sys/dev/pci On sparc64, the memory arbiter may be disabled b...



details:   https://anonhg.NetBSD.org/src/rev/4dfd7201cc8a
branches:  trunk
changeset: 786947:4dfd7201cc8a
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Fri May 24 11:47:47 2013 +0000

description:
On sparc64, the memory arbiter may be disabled by OF.
Move the HW config checking stuff to after bge_reset(). bge_reset()
initializes both byte order settings and the memory arbiter.

 The hwcfg stuff will be required in bge_reset() in future, so we should
rethink about hwconfig and bge_reset().

diffstat:

 sys/dev/pci/if_bge.c |  40 +++++++++++++++++-----------------------
 1 files changed, 17 insertions(+), 23 deletions(-)

diffs (82 lines):

diff -r 78912a415266 -r 4dfd7201cc8a sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c      Fri May 24 11:47:13 2013 +0000
+++ b/sys/dev/pci/if_bge.c      Fri May 24 11:47:47 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bge.c,v 1.247 2013/05/24 02:35:28 msaitoh Exp $     */
+/*     $NetBSD: if_bge.c,v 1.248 2013/05/24 11:47:47 msaitoh Exp $     */
 
 /*
  * Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.247 2013/05/24 02:35:28 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.248 2013/05/24 11:47:47 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -3584,7 +3584,7 @@
 
        sc->bge_asf_mode = 0;
        /* No ASF if APE present. */
-       if (0 && (sc->bge_flags & BGE_APE) == 0) {
+       if ((sc->bge_flags & BGE_APE) == 0) {
                if (bge_allow_asf && (bge_readmem_ind(sc, BGE_SRAM_DATA_SIG) ==
                        BGE_SRAM_DATA_SIG_MAGIC)) {
                        if (bge_readmem_ind(sc, BGE_SRAM_DATA_CFG) &
@@ -3597,11 +3597,19 @@
                }
        }
 
-       /* 5718 reset step 5, 57XX step 5b-5d */
-       /* Set swap options before using bge_readmem_ind() */
-       pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_MISC_CTL,
-           BGE_PCIMISCCTL_INDIRECT_ACCESS | BGE_PCIMISCCTL_MASK_PCI_INTR |
-           BGE_HIF_SWAP_OPTIONS | BGE_PCIMISCCTL_PCISTATE_RW);
+       /*
+        * Reset NVRAM before bge_reset(). It's required to acquire NVRAM
+        * lock in bge_reset().
+        */
+       CSR_WRITE_4(sc, BGE_EE_ADDR,
+           BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
+       delay(1000);
+       BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
+
+       bge_stop_fw(sc);
+       bge_sig_pre_reset(sc, BGE_RESET_START);
+       if (bge_reset(sc))
+               aprint_error_dev(sc->bge_dev, "chip reset failed\n");
 
        /*
         * Read the hardware config word in the first 32k of NIC internal
@@ -3609,7 +3617,7 @@
         * Note: on some BCM5700 cards, this value appears to be unset.
         */
        hwcfg = hwcfg2 = hwcfg3 = hwcfg4 = 0;
-       if (0 && bge_readmem_ind(sc, BGE_SRAM_DATA_SIG) ==
+       if (bge_readmem_ind(sc, BGE_SRAM_DATA_SIG) ==
            BGE_SRAM_DATA_SIG_MAGIC) {
                uint32_t tmp;
 
@@ -3630,20 +3638,6 @@
        aprint_normal_dev(sc->bge_dev, "HW config %08x, %08x, %08x, %08x\n",
            hwcfg, hwcfg2, hwcfg3, hwcfg4);
 
-       /*
-        * Reset NVRAM before bge_reset(). It's required to acquire NVRAM
-        * lock in bge_reset().
-        */
-       CSR_WRITE_4(sc, BGE_EE_ADDR,
-           BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
-       delay(1000);
-       BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
-
-       bge_stop_fw(sc);
-       bge_sig_pre_reset(sc, BGE_RESET_START);
-       if (bge_reset(sc))
-               aprint_error_dev(sc->bge_dev, "chip reset failed\n");
-
        bge_sig_legacy(sc, BGE_RESET_START);
        bge_sig_post_reset(sc, BGE_RESET_START);
 



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