[src/trunk]: src/sys/arch/mips/mips Remove mips32r2 error introduced in previ...

[simonb <simonb%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/88d195fa0be9
branches:  trunk
changeset: 934640:88d195fa0be9
user:      simonb <simonb%NetBSD.org@localhost>
date:      Mon Jun 15 00:31:21 2020 +0000

description:
Remove mips32r2 error introduced in previous commit; there no MP support
at all for 32-bit MIPSNN kernels.

diffstat:

 sys/arch/mips/mips/mips_machdep.c |  9 ++++-----
 1 files changed, 4 insertions(+), 5 deletions(-)

diffs (37 lines):

diff -r 0ac0f6bbe932 -r 88d195fa0be9 sys/arch/mips/mips/mips_machdep.c
--- a/sys/arch/mips/mips/mips_machdep.c Mon Jun 15 00:18:47 2020 +0000
+++ b/sys/arch/mips/mips/mips_machdep.c Mon Jun 15 00:31:21 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mips_machdep.c,v 1.290 2020/06/14 14:45:12 simonb Exp $        */
+/*     $NetBSD: mips_machdep.c,v 1.291 2020/06/15 00:31:21 simonb Exp $        */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -111,7 +111,7 @@
  */
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.290 2020/06/14 14:45:12 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.291 2020/06/15 00:31:21 simonb Exp $");
 
 #define __INTR_PRIVATE
 #include "opt_cputype.h"
@@ -946,7 +946,7 @@
         * If this CPU doesn't have a COP0 USERLOCAL register, at the end
         * of cpu_switch resume overwrite the instructions which update it.
         */
-       if (!MIPS_HAS_USERLOCAL && cpunum == 0) {
+       if (!MIPS_HAS_USERLOCAL) {
                extern uint32_t mips32r2_cpu_switch_resume[];
                for (uint32_t *insnp = mips32r2_cpu_switch_resume;; insnp++) {
                        KASSERT(insnp[0] != JR_RA);
@@ -962,8 +962,7 @@
        /*
         * Copy locore-function vector.
         */
-       if (cpunum == 0)
-               mips_locore_jumpvec = mips32r2_locore_vec;
+       mips_locore_jumpvec = mips32r2_locore_vec;
 
        mips_icache_sync_all();
        mips_dcache_wbinv_all();