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[src/trunk]: src/sys/arch Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
details: https://anonhg.NetBSD.org/src/rev/12c5f74742c4
branches: trunk
changeset: 935048:12c5f74742c4
user: simonb <simonb%NetBSD.org@localhost>
date: Tue Jun 23 05:18:02 2020 +0000
description:
Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
diffstat:
sys/arch/evbmips/conf/ERLITE | 14 ++-
sys/arch/mips/cavium/dev/octeon_pip.c | 70 +++++++++++++++-
sys/arch/mips/cavium/dev/octeon_pipreg.h | 84 ++++++++++-----------
sys/arch/mips/cavium/dev/octeon_pipvar.h | 3 +-
sys/arch/mips/cavium/dev/octeon_smi.c | 124 +++++++++++++++++++++---------
sys/arch/mips/cavium/dev/octeon_smireg.h | 28 +++----
sys/arch/mips/cavium/dev/octeon_smivar.h | 13 +--
sys/arch/mips/cavium/octeon1p_iobus.c | 41 ++++++---
8 files changed, 243 insertions(+), 134 deletions(-)
diffs (truncated from 649 to 300 lines):
diff -r c794f0e6f15f -r 12c5f74742c4 sys/arch/evbmips/conf/ERLITE
--- a/sys/arch/evbmips/conf/ERLITE Tue Jun 23 05:17:13 2020 +0000
+++ b/sys/arch/evbmips/conf/ERLITE Tue Jun 23 05:18:02 2020 +0000
@@ -1,11 +1,11 @@
-# $NetBSD: ERLITE,v 1.26 2020/06/05 07:17:38 simonb Exp $
+# $NetBSD: ERLITE,v 1.27 2020/06/23 05:18:02 simonb Exp $
include "arch/mips/conf/std.octeon"
include "arch/evbmips/conf/files.octeon"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "ERLITE-$Revision: 1.26 $"
+#ident "ERLITE-$Revision: 1.27 $"
maxusers 32
@@ -116,12 +116,16 @@
com* at iobus?
-octrnm* at iobus?
+octsmi* at iobus? # MDIO controller
+octpip* at iobus? # PIP packet processing controller
-octgmx* at iobus?
+octgmx* at octpip?
cnmac* at octgmx?
+octrnm* at iobus? # Random Number Memory (and generator)
+
dwctwo* at iobus?
+
usb* at dwctwo?
uhub* at usb?
@@ -131,6 +135,7 @@
scsibus* at umass? channel ?
sd* at scsibus? target ? lun ? # SCSI disk drives
+# Ethernet PHYs
atphy* at mii? phy ? # Attansic/Atheros PHYs
ukphy* at mii? phy ? # generic unknown PHYs
@@ -173,4 +178,3 @@
include "dev/veriexec.config"
cinclude "arch/evbmips/conf/ERLITE.local"
-
diff -r c794f0e6f15f -r 12c5f74742c4 sys/arch/mips/cavium/dev/octeon_pip.c
--- a/sys/arch/mips/cavium/dev/octeon_pip.c Tue Jun 23 05:17:13 2020 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_pip.c Tue Jun 23 05:18:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_pip.c,v 1.7 2020/06/22 03:05:07 simonb Exp $ */
+/* $NetBSD: octeon_pip.c,v 1.8 2020/06/23 05:18:02 simonb Exp $ */
/*
* Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -27,9 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_pip.c,v 1.7 2020/06/22 03:05:07 simonb Exp $");
-
-#include "opt_octeon.h"
+__KERNEL_RCSID(0, "$NetBSD: octeon_pip.c,v 1.8 2020/06/23 05:18:02 simonb Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -37,10 +35,68 @@
#include <sys/syslog.h>
#include <sys/time.h>
#include <net/if.h>
+
#include <mips/locore.h>
+
#include <mips/cavium/octeonvar.h>
+#include <mips/cavium/dev/octeon_gmxreg.h>
#include <mips/cavium/dev/octeon_pipreg.h>
#include <mips/cavium/dev/octeon_pipvar.h>
+#include <mips/cavium/include/iobusvar.h>
+
+static int octpip_match(device_t, struct cfdata *, void *);
+static void octpip_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(octpip, sizeof(struct octpip_softc),
+ octpip_match, octpip_attach, NULL, NULL);
+
+static int
+octpip_match(device_t parent, struct cfdata *cf, void *aux)
+{
+ struct iobus_attach_args *aa = aux;
+
+ if (strcmp(cf->cf_name, aa->aa_name) != 0)
+ return 0;
+ return 1;
+}
+
+static void
+octpip_attach(device_t parent, device_t self, void *aux)
+{
+ struct octpip_softc *sc = device_private(self);
+ struct iobus_attach_args *aa = aux;
+ struct iobus_attach_args gmxaa;
+ struct iobus_unit gmxiu;
+ int i, ndevs;
+
+ sc->sc_dev = self;
+
+ aprint_normal("\n");
+
+ /*
+ * XXX: In a non-FDT world, should allow for the configuration
+ * of multple GMX devices.
+ */
+ ndevs = 1;
+
+ for (i = 0; i < ndevs; i++) {
+ memcpy(&gmxaa, aa, sizeof(gmxaa));
+ memset(&gmxiu, 0, sizeof(gmxiu));
+
+ gmxaa.aa_name = "octgmx";
+ gmxaa.aa_unitno = i;
+ gmxaa.aa_unit = &gmxiu;
+ gmxaa.aa_bust = aa->aa_bust;
+ gmxaa.aa_dmat = aa->aa_dmat;
+
+ if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN68XX)
+ gmxiu.addr = GMX_CN68XX_BASE_PORT(i, 0);
+ else
+ gmxiu.addr = GMX_BASE_PORT(i, 0);
+
+ config_found(self, &gmxaa, NULL);
+ }
+}
/* XXX */
void
@@ -90,10 +146,10 @@
}
/* RAWDRP=0; don't allow raw packet drop */
/* TAGINC=0 */
- SET(prt_cfg, PIP_PRT_CFGN_DYN_RS);
+ /* DYN_RS=0; disable dynamic short buffering */
/* INST_HDR=0 */
/* GRP_WAT=0 */
- SET(prt_cfg, (sc->sc_port << 24) & PIP_PRT_CFGN_QOS);
+ SET(prt_cfg, __SHIFTIN(sc->sc_port, PIP_PRT_CFGN_QOS));
/* QOS_WAT=0 */
/* SPARE=0 */
/* QOS_DIFF=0 */
@@ -153,7 +209,7 @@
panic("%s: invalid argument. sc=%p, ifp=%p\n", __func__,
sc, ifp);
- if (gmx_port < 0 || gmx_port > 2) {
+ if (gmx_port < 0 || gmx_port > GMX_PORT_NUNITS) {
printf("%s: invalid gmx_port %d\n", __func__, gmx_port);
return;
}
diff -r c794f0e6f15f -r 12c5f74742c4 sys/arch/mips/cavium/dev/octeon_pipreg.h
--- a/sys/arch/mips/cavium/dev/octeon_pipreg.h Tue Jun 23 05:17:13 2020 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_pipreg.h Tue Jun 23 05:18:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_pipreg.h,v 1.4 2020/06/22 12:26:11 simonb Exp $ */
+/* $NetBSD: octeon_pipreg.h,v 1.5 2020/06/23 05:18:02 simonb Exp $ */
/*
* Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -80,6 +80,7 @@
#define PIP_QOS_DIFF0 0x00011800a0000600ULL
/* PIP_QOS_DIFF[1-63] */
/* PIP_STAT[0-9]_PRT{0,1,2,32} */
+#define PIP_STAT0_PRT(i) (0x00011800a0000800ULL + (i) * 0x50)
#define PIP_STAT0_PRT0 0x00011800a0000800ULL
#define PIP_STAT0_PRT1 0x00011800a0000850ULL
#define PIP_STAT0_PRT2 0x00011800a00008a0ULL
@@ -275,7 +276,7 @@
#define PIP_GBL_CFG_15_11 UINT64_C(0x000000000000f800)
#define PIP_GBL_CFG_RAW_SHF UINT64_C(0x0000000000000700)
#define PIP_GBL_CFG_7_3 UINT64_C(0x00000000000000f8)
-#define PIP_GBL_CFG_NIP_SHF UINT64_C(0x0000000000000007)
+#define PIP_GBL_CFG_NIP_SHF_MASK UINT64_C(0x0000000000000007)
/*
* PIP_SFT_RST
@@ -576,51 +577,46 @@
#define PIP_WQE_WORD3_ADDR UINT64_C(0x000000ffffffffff)
/* opcode for WORD2[LE] */
-#define PIP_WQE_WORD2_LE_OPCODE_MAL 1ULL
-#define PIP_WQE_WORD2_LE_OPCODE_CSUM 2ULL
-#define PIP_WQE_WORD2_LE_OPCODE_UDPLEN 3ULL
-#define PIP_WQE_WORD2_LE_OPCODE_PORT 4ULL
-#define PIP_WQE_WORD2_LE_OPCODE_XXX_5 5ULL
-#define PIP_WQE_WORD2_LE_OPCODE_XXX_6 6ULL
-#define PIP_WQE_WORD2_LE_OPCODE_XXX_7 7ULL
-#define PIP_WQE_WORD2_LE_OPCODE_FINO 8ULL
-#define PIP_WQE_WORD2_LE_OPCODE_NOFL 9ULL
-#define PIP_WQE_WORD2_LE_OPCODE_FINRST 10ULL
-#define PIP_WQE_WORD2_LE_OPCODE_SYNURG 11ULL
-#define PIP_WQE_WORD2_LE_OPCODE_SYNRST 12ULL
-#define PIP_WQE_WORD2_LE_OPCODE_SYNFIN 13ULL
+#define PIP_WQE_WORD2_LE_OPCODE_MAL 1
+#define PIP_WQE_WORD2_LE_OPCODE_CSUM 2
+#define PIP_WQE_WORD2_LE_OPCODE_UDPLEN 3
+#define PIP_WQE_WORD2_LE_OPCODE_PORT 4
+#define PIP_WQE_WORD2_LE_OPCODE_XXX_5 5
+#define PIP_WQE_WORD2_LE_OPCODE_XXX_6 6
+#define PIP_WQE_WORD2_LE_OPCODE_XXX_7 7
+#define PIP_WQE_WORD2_LE_OPCODE_FINO 8
+#define PIP_WQE_WORD2_LE_OPCODE_NOFL 9
+#define PIP_WQE_WORD2_LE_OPCODE_FINRST 10
+#define PIP_WQE_WORD2_LE_OPCODE_SYNURG 11
+#define PIP_WQE_WORD2_LE_OPCODE_SYNRST 12
+#define PIP_WQE_WORD2_LE_OPCODE_SYNFIN 13
/* opcode for WORD2[IE] */
-#define PIP_WQE_WORD2_IE_OPCODE_NOTIP 1ULL
-#define PIP_WQE_WORD2_IE_OPCODE_CSUM 2ULL
-#define PIP_WQE_WORD2_IE_OPCODE_MALHDR 3ULL
-#define PIP_WQE_WORD2_IE_OPCODE_MAL 4ULL
-#define PIP_WQE_WORD2_IE_OPCODE_TTL 5ULL
-#define PIP_WQE_WORD2_IE_OPCODE_OPT 6ULL
+#define PIP_WQE_WORD2_IE_OPCODE_NOTIP 1
+#define PIP_WQE_WORD2_IE_OPCODE_CSUM 2
+#define PIP_WQE_WORD2_IE_OPCODE_MALHDR 3
+#define PIP_WQE_WORD2_IE_OPCODE_MAL 4
+#define PIP_WQE_WORD2_IE_OPCODE_TTL 5
+#define PIP_WQE_WORD2_IE_OPCODE_OPT 6
/* opcode for WORD2[RE] */
-#define PIP_WQE_WORD2_RE_OPCODE_PARTIAL 1ULL
-#define PIP_WQE_WORD2_RE_OPCODE_JABBER 2ULL
-#define PIP_WQE_WORD2_RE_OPCODE_OVRRUN 3ULL
-#define PIP_WQE_WORD2_RE_OPCODE_OVRSZ 4ULL
-#define PIP_WQE_WORD2_RE_OPCODE_ALIGN 5ULL
-#define PIP_WQE_WORD2_RE_OPCODE_FRAG 6ULL
-#define PIP_WQE_WORD2_RE_OPCODE_GMXFCS 7ULL
-#define PIP_WQE_WORD2_RE_OPCODE_UDRSZ 8ULL
-#define PIP_WQE_WORD2_RE_OPCODE_EXTEND 9ULL
-#define PIP_WQE_WORD2_RE_OPCODE_LENGTH 10ULL
-#define PIP_WQE_WORD2_RE_OPCODE_MIIRX 11ULL
-#define PIP_WQE_WORD2_RE_OPCODE_MIISKIP 12ULL
-#define PIP_WQE_WORD2_RE_OPCODE_MIINBL 13ULL
-#define PIP_WQE_WORD2_RE_OPCODE_XXX_14 14ULL
-#define PIP_WQE_WORD2_RE_OPCODE_XXX_15 15ULL
-#define PIP_WQE_WORD2_RE_OPCODE_XXX_16 16ULL
-#define PIP_WQE_WORD2_RE_OPCODE_SKIP 17ULL
-#define PIP_WQE_WORD2_RE_OPCODE_L2MAL 18ULL
-
-/* XXX backward compatibility */
-#define PIP_OVER_ERR PIP_WQE_WORD2_RE_OPCODE_OVRRUN
-#define PIP_GMX_FCS_ERR PIP_WQE_WORD2_RE_OPCODE_GMXFCS
-#define PIP_ALIGN_ERR PIP_WQE_WORD2_RE_OPCODE_ALIGN
+#define PIP_WQE_WORD2_RE_OPCODE_PARTIAL 1
+#define PIP_WQE_WORD2_RE_OPCODE_JABBER 2
+#define PIP_WQE_WORD2_RE_OPCODE_OVRRUN 3
+#define PIP_WQE_WORD2_RE_OPCODE_OVRSZ 4
+#define PIP_WQE_WORD2_RE_OPCODE_ALIGN 5
+#define PIP_WQE_WORD2_RE_OPCODE_FRAG 6
+#define PIP_WQE_WORD2_RE_OPCODE_GMXFCS 7
+#define PIP_WQE_WORD2_RE_OPCODE_UDRSZ 8
+#define PIP_WQE_WORD2_RE_OPCODE_EXTEND 9
+#define PIP_WQE_WORD2_RE_OPCODE_LENGTH 10
+#define PIP_WQE_WORD2_RE_OPCODE_MIIRX 11
+#define PIP_WQE_WORD2_RE_OPCODE_MIISKIP 12
+#define PIP_WQE_WORD2_RE_OPCODE_MIINBL 13
+#define PIP_WQE_WORD2_RE_OPCODE_XXX_14 14
+#define PIP_WQE_WORD2_RE_OPCODE_XXX_15 15
+#define PIP_WQE_WORD2_RE_OPCODE_XXX_16 16
+#define PIP_WQE_WORD2_RE_OPCODE_SKIP 17
+#define PIP_WQE_WORD2_RE_OPCODE_L2MAL 18
#endif /* _OCTEON_PIPREG_H_ */
diff -r c794f0e6f15f -r 12c5f74742c4 sys/arch/mips/cavium/dev/octeon_pipvar.h
--- a/sys/arch/mips/cavium/dev/octeon_pipvar.h Tue Jun 23 05:17:13 2020 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_pipvar.h Tue Jun 23 05:18:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_pipvar.h,v 1.4 2020/06/22 02:26:20 simonb Exp $ */
+/* $NetBSD: octeon_pipvar.h,v 1.5 2020/06/23 05:18:02 simonb Exp $ */
/*
* Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -32,6 +32,7 @@
/* XXX */
struct octpip_softc {
+ device_t sc_dev;
int sc_port;
bus_space_tag_t sc_regt;
bus_space_handle_t sc_regh;
diff -r c794f0e6f15f -r 12c5f74742c4 sys/arch/mips/cavium/dev/octeon_smi.c
--- a/sys/arch/mips/cavium/dev/octeon_smi.c Tue Jun 23 05:17:13 2020 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_smi.c Tue Jun 23 05:18:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_smi.c,v 1.4 2020/06/18 13:52:08 simonb Exp $ */
+/* $NetBSD: octeon_smi.c,v 1.5 2020/06/23 05:18:02 simonb Exp $ */
/*
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