[src/trunk]: src/sys/arch/mips/mips Adjust for new CP0 reg names, comment out...

[simonb <simonb%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/032980bc3acb
branches:  trunk
changeset: 936354:032980bc3acb
user:      simonb <simonb%NetBSD.org@localhost>
date:      Sun Jul 26 07:47:27 2020 +0000

description:
Adjust for new CP0 reg names, comment out most of the Cavium CP0
specific functions that are unused.

diffstat:

 sys/arch/mips/mips/locore_octeon.S |  36 +++++++++++++++++++-----------------
 1 files changed, 19 insertions(+), 17 deletions(-)

diffs (104 lines):

diff -r e369d0d18dd9 -r 032980bc3acb sys/arch/mips/mips/locore_octeon.S
--- a/sys/arch/mips/mips/locore_octeon.S        Sun Jul 26 07:46:21 2020 +0000
+++ b/sys/arch/mips/mips/locore_octeon.S        Sun Jul 26 07:47:27 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore_octeon.S,v 1.11 2020/07/20 03:24:59 simonb Exp $        */
+/*     $NetBSD: locore_octeon.S,v 1.12 2020/07/26 07:47:27 simonb Exp $        */
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <mips/asm.h>
-RCSID("$NetBSD: locore_octeon.S,v 1.11 2020/07/20 03:24:59 simonb Exp $")
+RCSID("$NetBSD: locore_octeon.S,v 1.12 2020/07/26 07:47:27 simonb Exp $")
 
 #include "cpunode.h"                   /* for NWDOG */
 #include "opt_cputype.h"
@@ -37,7 +37,7 @@
 #include <mips/cpuregs.h>
 #include <arch/mips/cavium/dev/octeon_corereg.h>
 
-RCSID("$NetBSD: locore_octeon.S,v 1.11 2020/07/20 03:24:59 simonb Exp $")
+RCSID("$NetBSD: locore_octeon.S,v 1.12 2020/07/26 07:47:27 simonb Exp $")
 
 #include "assym.h"
 
@@ -58,60 +58,62 @@
        .text
 
 LEAF(mips_cp0_cvmctl_read)
-       _CP0_READ64(CP0_CVMCTL)
+       _CP0_READ64(MIPS_COP_0_CVMCTL)
 END(mips_cp0_cvmctl_read)
 
+#ifdef notyet /* the rest of these aren't used (yet) */
 LEAF(mips_cp0_cvmctl_write)
-       _CP0_WRITE64(CP0_CVMCTL)
+       _CP0_WRITE64(MIPS_COP_0_CVMCTL)
 END(mips_cp0_cvmctl_write)
 
 LEAF(mips_cp0_cvmmemctl_read)
-       _CP0_READ64(CP0_CVMMEMCTL)
+       _CP0_READ64(MIPS_COP_0_CVMMEMCTL)
 END(mips_cp0_cvmmemctl_read)
 
 LEAF(mips_cp0_cvmmemctl_write)
-       _CP0_WRITE64(CP0_CVMMEMCTL)
+       _CP0_WRITE64(MIPS_COP_0_CVMMEMCTL)
 END(mips_cp0_cvmmemctl_write)
 
 LEAF(mips_cp0_cvmcnt_read)
-       _CP0_READ64(CP0_CVMCNT)
+       _CP0_READ64(MIPS_COP_0_CVMCNT)
 END(mips_cp0_cvmcnt_read)
 
 LEAF(mips_cp0_cvmcnt_write)
-       _CP0_WRITE64(CP0_CVMCNT)
+       _CP0_WRITE64(MIPS_COP_0_CVMCNT)
 END(mips_cp0_cvmcnt_write)
 
 LEAF(mips_cp0_performance_counter_control0_read)
-       _CP0_READ64(CP0_PCCTL)
+       _CP0_READ64(MIPS_COP_0_PERFCNT0_CTL)
 END(mips_cp0_performance_counter_control0_read)
 
 LEAF(mips_cp0_performance_counter_control0_write)
-       _CP0_WRITE64(CP0_PCCTL)
+       _CP0_WRITE64(MIPS_COP_0_PERFCNT0_CTL)
 END(mips_cp0_performance_counter_control0_write)
 
 LEAF(mips_cp0_performance_counter_control1_read)
-       _CP0_READ64(CP0_PCCTL1)
+       _CP0_READ64(MIPS_COP_0_PERFCNT1_CTL)
 END(mips_cp0_performance_counter_control1_read)
 
 LEAF(mips_cp0_performance_counter_control1_write)
-       _CP0_WRITE64(CP0_PCCTL1)
+       _CP0_WRITE64(MIPS_COP_0_PERFCNT1_CTL)
 END(mips_cp0_performance_counter_control1_write)
 
 LEAF(mips_cp0_performance_counter_counter0_read)
-       _CP0_READ64(CP0_PCCNT)
+       _CP0_READ64(MIPS_COP_0_PERFCNT0_CNT)
 END(mips_cp0_performance_counter_counter0_read)
 
 LEAF(mips_cp0_performance_counter_counter0_write)
-       _CP0_WRITE64(CP0_PCCNT)
+       _CP0_WRITE64(MIPS_COP_0_PERFCNT0_CNT)
 END(mips_cp0_performance_counter_counter0_write)
 
 LEAF(mips_cp0_performance_counter_counter1_read)
-       _CP0_READ64(CP0_PCCNT1)
+       _CP0_READ64(MIPS_COP_0_PERFCNT1_CNT)
 END(mips_cp0_performance_counter_counter1_read)
 
 LEAF(mips_cp0_performance_counter_counter1_write)
-       _CP0_WRITE64(CP0_PCCNT1)
+       _CP0_WRITE64(MIPS_COP_0_PERFCNT1_CNT)
 END(mips_cp0_performance_counter_counter1_write)
+#endif /* notyet */
 
 #ifdef MULTIPROCESSOR