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[src/trunk]: src/sys/dev/virtio MMIO configuration space is in guest byte ord...
details: https://anonhg.NetBSD.org/src/rev/820298084c16
branches: trunk
changeset: 940081:820298084c16
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat Oct 03 13:51:34 2020 +0000
description:
MMIO configuration space is in guest byte order. AArch64 BE is special,
as the guest starts in LE and we switch to BE after the kernel starts.
For this case, we need to byte swap all config space accesses.
diffstat:
sys/dev/virtio/virtio_mmio.c | 43 ++++++++++++++++++++++++++++++++-----------
1 files changed, 32 insertions(+), 11 deletions(-)
diffs (107 lines):
diff -r 5c3153db63f9 -r 820298084c16 sys/dev/virtio/virtio_mmio.c
--- a/sys/dev/virtio/virtio_mmio.c Sat Oct 03 13:22:39 2020 +0000
+++ b/sys/dev/virtio/virtio_mmio.c Sat Oct 03 13:51:34 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: virtio_mmio.c,v 1.2 2018/06/15 17:13:43 jakllsch Exp $ */
+/* $NetBSD: virtio_mmio.c,v 1.3 2020/10/03 13:51:34 jmcneill Exp $ */
/* $OpenBSD: virtio_mmio.c,v 1.2 2017/02/24 17:12:31 patrick Exp $ */
/*
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: virtio_mmio.c,v 1.2 2018/06/15 17:13:43 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: virtio_mmio.c,v 1.3 2020/10/03 13:51:34 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -66,6 +66,27 @@
#define VIRTIO_MMIO_INT_CONFIG (1 << 1)
/*
+ * MMIO configuration space is in guest byte order. AArch64 BE is special,
+ * as the guest starts in LE and we switch to BE after the kernel starts.
+ * For this case, we need to byte swap all config space accesses.
+ */
+#if defined(__aarch64__) && BYTE_ORDER == BIG_ENDIAN
+#define VIO16TOH(x) le16toh(x)
+#define VIO32TOH(x) le32toh(x)
+#define VIO64TOH(x) le64toh(x)
+#define HTOVIO16(x) htole16(x)
+#define HTOVIO32(x) htole32(x)
+#define HTOVIO64(x) htole64(x)
+#else
+#define VIO16TOH(x) (x)
+#define VIO32TOH(x) (x)
+#define VIO64TOH(x) (x)
+#define HTOVIO16(x) (x)
+#define HTOVIO32(x) (x)
+#define HTOVIO64(x) (x)
+#endif
+
+/*
* XXX: Before being used on big endian arches, the access to config registers
* XXX: needs to be reviewed/fixed. The non-device specific registers are
* XXX: PCI-endian while the device specific registers are native endian.
@@ -242,16 +263,16 @@
virtio_mmio_read_device_config_2(struct virtio_softc *vsc, int index)
{
struct virtio_mmio_softc *sc = (struct virtio_mmio_softc *)vsc;
- return bus_space_read_2(sc->sc_iot, sc->sc_ioh,
- VIRTIO_MMIO_CONFIG + index);
+ return VIO16TOH(bus_space_read_2(sc->sc_iot, sc->sc_ioh,
+ VIRTIO_MMIO_CONFIG + index));
}
static uint32_t
virtio_mmio_read_device_config_4(struct virtio_softc *vsc, int index)
{
struct virtio_mmio_softc *sc = (struct virtio_mmio_softc *)vsc;
- return bus_space_read_4(sc->sc_iot, sc->sc_ioh,
- VIRTIO_MMIO_CONFIG + index);
+ return VIO32TOH(bus_space_read_4(sc->sc_iot, sc->sc_ioh,
+ VIRTIO_MMIO_CONFIG + index));
}
static uint64_t
@@ -265,7 +286,7 @@
r <<= 32;
r += bus_space_read_4(sc->sc_iot, sc->sc_ioh,
VIRTIO_MMIO_CONFIG + index);
- return r;
+ return VIO64TOH(r);
}
static void
@@ -283,7 +304,7 @@
{
struct virtio_mmio_softc *sc = (struct virtio_mmio_softc *)vsc;
bus_space_write_2(sc->sc_iot, sc->sc_ioh,
- VIRTIO_MMIO_CONFIG + index, value);
+ VIRTIO_MMIO_CONFIG + index, HTOVIO16(value));
}
static void
@@ -292,7 +313,7 @@
{
struct virtio_mmio_softc *sc = (struct virtio_mmio_softc *)vsc;
bus_space_write_4(sc->sc_iot, sc->sc_ioh,
- VIRTIO_MMIO_CONFIG + index, value);
+ VIRTIO_MMIO_CONFIG + index, HTOVIO32(value));
}
static void
@@ -302,10 +323,10 @@
struct virtio_mmio_softc *sc = (struct virtio_mmio_softc *)vsc;
bus_space_write_4(sc->sc_iot, sc->sc_ioh,
VIRTIO_MMIO_CONFIG + index,
- value & 0xffffffff);
+ HTOVIO64(value) & 0xffffffff);
bus_space_write_4(sc->sc_iot, sc->sc_ioh,
VIRTIO_MMIO_CONFIG + index + sizeof(uint32_t),
- value >> 32);
+ HTOVIO64(value) >> 32);
}
/*
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