Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/x86/include Add a few more CPUID flags.
details: https://anonhg.NetBSD.org/src/rev/59965e060252
branches: trunk
changeset: 943473:59965e060252
user: maxv <maxv%NetBSD.org@localhost>
date: Fri Sep 04 17:05:09 2020 +0000
description:
Add a few more CPUID flags.
diffstat:
sys/arch/x86/include/specialreg.h | 10 +++++++++-
1 files changed, 9 insertions(+), 1 deletions(-)
diffs (31 lines):
diff -r 271c7577a10f -r 59965e060252 sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Fri Sep 04 17:03:17 2020 +0000
+++ b/sys/arch/x86/include/specialreg.h Fri Sep 04 17:05:09 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.171 2020/08/05 15:40:46 maxv Exp $ */
+/* $NetBSD: specialreg.h,v 1.172 2020/09/04 17:05:09 maxv Exp $ */
/*
* Copyright (c) 2014-2020 The NetBSD Foundation, Inc.
@@ -759,6 +759,11 @@
#define CPUID_CAPEX_VIRT_SSBD __BIT(25) /* Virt Spec Control SSBD */
#define CPUID_CAPEX_SSB_NO __BIT(26) /* SSBD not required */
+/* %ecx */
+#define CPUID_CAPEX_PerfTscSize __BITS(17,16)
+#define CPUID_CAPEX_ApicIdSize __BITS(15,12)
+#define CPUID_CAPEX_NC __BITS(7,0)
+
#define CPUID_CAPEX_FLAGS "\20" \
"\1CLZERO" "\2IRPERF" "\3XSAVEERPTR" \
"\5RDPRU" "\7B6" \
@@ -767,6 +772,9 @@
"\21IBRS_ALWAYSON" "\22STIBP_ALWAYSON" "\23PREFER_IBRS" "\24B19" \
"\31SSBD" "\32VIRT_SSBD" "\33SSB_NO"
+/* AMD Fn8000_000a %eax (SVM Revision) */
+#define CPUID_AMD_SVM_REV __BITS(7,0)
+
/* AMD Fn8000_000a %edx features (SVM features) */
#define CPUID_AMD_SVM_NP 0x00000001
#define CPUID_AMD_SVM_LbrVirt 0x00000002
Home |
Main Index |
Thread Index |
Old Index