[src/trunk]: src/sys/arch/aarch64/include add some fields of ID_AA64ISAR1_EL1...

[ryo <ryo%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/a3f39cdaea6d
branches:  trunk
changeset: 944479:a3f39cdaea6d
user:      ryo <ryo%NetBSD.org@localhost>
date:      Wed Sep 30 08:40:49 2020 +0000

description:
add some fields of ID_AA64ISAR1_EL1 definition (ARMv8.6)

diffstat:

 sys/arch/aarch64/include/armreg.h |  11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diffs (25 lines):

diff -r d25815160bea -r a3f39cdaea6d sys/arch/aarch64/include/armreg.h
--- a/sys/arch/aarch64/include/armreg.h Wed Sep 30 08:32:00 2020 +0000
+++ b/sys/arch/aarch64/include/armreg.h Wed Sep 30 08:40:49 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.53 2020/09/15 09:28:21 ryo Exp $ */
+/* $NetBSD: armreg.h,v 1.54 2020/09/30 08:40:49 ryo Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -307,6 +307,15 @@
 
 AARCH64REG_READ_INLINE(id_aa64isar1_el1)
 
+#define        ID_AA64ISAR1_EL1_I8MM           __BITS(55,52)
+#define         ID_AA64ISAR1_EL1_I8MM_NONE      0
+#define         ID_AA64ISAR1_EL1_I8MM_SUPPORTED 1
+#define        ID_AA64ISAR1_EL1_DGH            __BITS(51,48)
+#define         ID_AA64ISAR1_EL1_DGH_NONE       0
+#define         ID_AA64ISAR1_EL1_DGH_SUPPORTED  1
+#define        ID_AA64ISAR1_EL1_BF16           __BITS(47,44)
+#define         ID_AA64ISAR1_EL1_BF16_NONE      0
+#define         ID_AA64ISAR1_EL1_BF16_BFDOT     1
 #define        ID_AA64ISAR1_EL1_SPECRES        __BITS(43,40)
 #define         ID_AA64ISAR1_EL1_SPECRES_NONE   0
 #define         ID_AA64ISAR1_EL1_SPECRES_SUPPORTED 1