[src/trunk]: src/sys/arch/arm/arm Fix earmv6{,hf}eb start-up routines:

[rin <rin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4803da7122de
branches:  trunk
changeset: 946550:4803da7122de
user:      rin <rin%NetBSD.org@localhost>
date:      Tue Dec 01 02:46:19 2020 +0000

description:
Fix earmv6{,hf}eb start-up routines:

- Turn on U-bit in SCTLR before E-bit is turned on by ``setend be'',
  in order to avoid undefined condition. ARM1176JZF-S, at least, halts
  if only E-bit is turned on.

- Turn on EE-bit in SCTLR instead of B-bit as we've switched to BE8.

diffstat:

 sys/arch/arm/arm/armv6_start.S |  19 ++++++++++++++++---
 sys/arch/arm/arm/cpufunc.c     |  26 ++++++++++++++++----------
 2 files changed, 32 insertions(+), 13 deletions(-)

diffs (124 lines):

diff -r 0f12e74164f1 -r 4803da7122de sys/arch/arm/arm/armv6_start.S
--- a/sys/arch/arm/arm/armv6_start.S    Tue Dec 01 02:43:18 2020 +0000
+++ b/sys/arch/arm/arm/armv6_start.S    Tue Dec 01 02:46:19 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armv6_start.S,v 1.30 2020/10/13 21:06:18 skrll Exp $   */
+/*     $NetBSD: armv6_start.S,v 1.31 2020/12/01 02:46:19 rin Exp $     */
 
 /*-
  * Copyright (c) 2012, 2017, 2018 The NetBSD Foundation, Inc.
@@ -95,9 +95,16 @@
 
 ENTRY_NP(generic_start)
 
-       // ARMv7 only?!?
 #if defined(__ARMEB__)
+#  if defined(_ARM_ARCH_7)
        setend  be                      /* force big endian */
+#  else /* _ARM_ARCH_6 */
+       /* Make sure U bit is always set with E bit in SCTLR. */
+       mrc     p15, 0, R_TMP1, c1, c0, 0
+       orr     R_TMP1, R_TMP1, #CPU_CONTROL_UNAL_ENABLE
+       mcr     p15, 0, R_TMP1, c1, c0, 0
+       setend  be
+#  endif
 #endif
 
        /* disable IRQs/FIQs. */
@@ -1086,6 +1093,11 @@
 #else
 #define        CPU_CONTROL_EXTRA       CPU_CONTROL_SYST_ENABLE
 #endif
+#if defined(__ARMEL__)
+#define        CPU_CONTROL_EX_BEND_SET 0
+#else
+#define        CPU_CONTROL_EX_BEND_SET CPU_CONTROL_EX_BEND
+#endif
        .word CPU_CONTROL_MMU_ENABLE  | \
              CPU_CONTROL_WBUF_ENABLE |    /* not defined in 1176 (SBO) */ \
              CPU_CONTROL_32BP_ENABLE |    /* SBO */ \
@@ -1094,7 +1106,8 @@
                (1 << 16) |     /* SBO - Global enable for data tcm */ \
                (1 << 18) |     /* SBO - Global enable for insn tcm */ \
              CPU_CONTROL_UNAL_ENABLE | \
-             CPU_CONTROL_EXTRA
+             CPU_CONTROL_EXTRA | \
+             CPU_CONTROL_EX_BEND_SET
 
        /* bits to clear in the Control Register */
 Lcontrol_clr:
diff -r 0f12e74164f1 -r 4803da7122de sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Tue Dec 01 02:43:18 2020 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Tue Dec 01 02:46:19 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.178 2020/10/30 18:54:36 skrll Exp $      */
+/*     $NetBSD: cpufunc.c,v 1.179 2020/12/01 02:46:19 rin Exp $        */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.178 2020/10/30 18:54:36 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.179 2020/12/01 02:46:19 rin Exp $");
 
 #include "opt_arm_start.h"
 #include "opt_compat_netbsd.h"
@@ -2769,6 +2769,11 @@
 #endif
            | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
            /* | CPU_CONTROL_BPRD_ENABLE */;
+
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_EX_BEND;
+#endif
+
        int cpuctrlmask = cpuctrl
            | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BPRD_ENABLE
            | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
@@ -2780,10 +2785,6 @@
 
        cpuctrl = parse_cpu_options(args, arm11_options, cpuctrl);
 
-#ifdef __ARMEB__
-       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
 #ifndef ARM_HAS_VBAR
        if (vector_page == ARM_VECTORS_HIGH)
                cpuctrl |= CPU_CONTROL_VECRELOC;
@@ -2818,6 +2819,11 @@
            | CPU_CONTROL_XP_ENABLE
 #endif
            | CPU_CONTROL_BPRD_ENABLE ;
+
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_EX_BEND;
+#endif
+
        int cpuctrlmask = cpuctrl
            | CPU_CONTROL_AFLT_ENABLE
            | CPU_CONTROL_VECRELOC;
@@ -3057,6 +3063,10 @@
 #endif
                CPU_CONTROL_IC_ENABLE;
 
+#ifdef __ARMEB__
+       cpuctrl |= CPU_CONTROL_EX_BEND;
+#endif
+
        /*
         * "write as existing" bits
         * inverse of this is mask
@@ -3075,10 +3085,6 @@
 
        cpuctrl = parse_cpu_options(args, arm11_options, cpuctrl);
 
-#ifdef __ARMEB__
-       cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
 #ifndef ARM_HAS_VBAR
        if (vector_page == ARM_VECTORS_HIGH)
                cpuctrl |= CPU_CONTROL_VECRELOC;