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[src/trunk]: src/sys/arch/alpha Reduce the __HAVE_FAST_SOFTINTS #ifdef perime...
details: https://anonhg.NetBSD.org/src/rev/e3a7e95acf3c
branches: trunk
changeset: 955054:e3a7e95acf3c
user: thorpej <thorpej%NetBSD.org@localhost>
date: Thu Sep 17 00:48:56 2020 +0000
description:
Reduce the __HAVE_FAST_SOFTINTS #ifdef perimeter.
diffstat:
sys/arch/alpha/alpha/interrupt.c | 28 ++++++++++++++++++++++------
sys/arch/alpha/alpha/locore.s | 14 ++------------
sys/arch/alpha/include/intr.h | 4 +---
3 files changed, 25 insertions(+), 21 deletions(-)
diffs (207 lines):
diff -r 7fd1c37c92f0 -r e3a7e95acf3c sys/arch/alpha/alpha/interrupt.c
--- a/sys/arch/alpha/alpha/interrupt.c Wed Sep 16 21:24:30 2020 +0000
+++ b/sys/arch/alpha/alpha/interrupt.c Thu Sep 17 00:48:56 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: interrupt.c,v 1.85 2020/09/16 04:07:32 thorpej Exp $ */
+/* $NetBSD: interrupt.c,v 1.86 2020/09/17 00:48:56 thorpej Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.85 2020/09/16 04:07:32 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.86 2020/09/17 00:48:56 thorpej Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -450,7 +450,9 @@
return (rv);
}
-#ifdef __HAVE_FAST_SOFTINTS
+/*
+ * Fast soft interrupt support.
+ */
#define SOFTINT_CLOCK_MASK __BIT(SOFTINT_CLOCK)
#define SOFTINT_BIO_MASK __BIT(SOFTINT_BIO)
@@ -468,6 +470,8 @@
#define SOFTINTS_ELIGIBLE(ipl) \
((ALPHA_ALL_SOFTINTS << ((ipl) << 1)) & ALPHA_ALL_SOFTINTS)
+#ifdef __HAVE_FAST_SOFTINTS
+
/* Validate some assumptions the code makes. */
__CTASSERT(SOFTINT_TO_IPL(SOFTINT_CLOCK) == ALPHA_PSL_IPL_SOFT_LO);
__CTASSERT(SOFTINT_TO_IPL(SOFTINT_BIO) == ALPHA_PSL_IPL_SOFT_LO);
@@ -522,6 +526,17 @@
*machdep = si_bit;
}
+#else /* ! __HAVE_FAST_SOFTINTS */
+
+/* Temporary stub for alpha_softint_switchto(). */
+void
+softint_dispatch(struct lwp * const pinned __unused, int const s __unused)
+{
+ panic("softint_dispatch");
+}
+
+#endif /* __HAVE_FAST_SOFTINTS */
+
/*
* Helper macro.
*
@@ -547,6 +562,7 @@
void
alpha_softint_dispatch(int const ipl)
{
+#ifdef __HAVE_FAST_SOFTINTS
struct lwp * const l = curlwp;
struct cpu_info * const ci = l->l_cpu;
unsigned long ssir;
@@ -564,9 +580,11 @@
DOSOFTINT(BIO);
DOSOFTINT(CLOCK);
}
+#else
+ panic("alpha_softint_dispatch");
+#endif /* __HAVE_FAST_SOFTINTS */
}
-#endif /* __HAVE_FAST_SOFTINTS */
/*
* spllower:
@@ -578,12 +596,10 @@
spllower(int const ipl)
{
-#ifdef __HAVE_FAST_SOFTINTS
if (ipl < ALPHA_PSL_IPL_SOFT_HI && curcpu()->ci_ssir) {
(void) alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH);
alpha_softint_dispatch(ipl);
}
-#endif /* __HAVE_FAST_SOFTINTS */
(void) alpha_pal_swpipl(ipl);
}
diff -r 7fd1c37c92f0 -r e3a7e95acf3c sys/arch/alpha/alpha/locore.s
--- a/sys/arch/alpha/alpha/locore.s Wed Sep 16 21:24:30 2020 +0000
+++ b/sys/arch/alpha/alpha/locore.s Thu Sep 17 00:48:56 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.133 2020/09/16 04:07:32 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.134 2020/09/17 00:48:56 thorpej Exp $ */
/*-
* Copyright (c) 1999, 2000, 2019 The NetBSD Foundation, Inc.
@@ -67,7 +67,7 @@
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: locore.s,v 1.133 2020/09/16 04:07:32 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: locore.s,v 1.134 2020/09/17 00:48:56 thorpej Exp $");
#include "assym.h"
@@ -256,13 +256,11 @@
GET_CURLWP
mov v0, s0 /* s0 = curlwp */
-#ifdef __HAVE_FAST_SOFTINTS
/* see if a soft interrupt is pending. */
2: ldq t1, L_CPU(s0) /* t1 = curlwp->l_cpu */
ldq t1, CPU_INFO_SSIR(t1) /* soft int pending? */
bne t1, 6f /* yes */
/* no */
-#endif /* __HAVE_FAST_SOFTINTS */
/* --- END inline spllower() --- */
@@ -291,7 +289,6 @@
.set at
/* NOTREACHED */
-#ifdef __HAVE_FAST_SOFTINTS
/* We've got a softint */
6: ldiq a0, ALPHA_PSL_IPL_HIGH
call_pal PAL_OSF1_swpipl
@@ -303,7 +300,6 @@
mov s2, a0
call_pal PAL_OSF1_swpipl
br 2b
-#endif /* __HAVE_FAST_SOFTINTS */
/* We've got an AST */
7: stl zero, L_MD_ASTPENDING(s0) /* no AST pending */
@@ -655,7 +651,6 @@
/**************************************************************************/
-#ifdef __HAVE_FAST_SOFTINTS
/*
* void alpha_softint_switchto(struct lwp *current, int ipl, struct lwp *next)
* Switch away from the current LWP to the specified softint LWP, and
@@ -755,7 +750,6 @@
lda sp, 16(sp) /* pop stack frame */
RET
END(alpha_softint_return)
-#endif /* __HAVE_FAST_SOFTINTS */
/*
* struct lwp *cpu_switchto(struct lwp *current, struct lwp *next,
@@ -787,7 +781,6 @@
mov a0, s4 /* save old curlwp */
mov a1, s2 /* save new lwp */
-#ifdef __HAVE_FAST_SOFTINTS
/*
* Check to see if we're doing a light-weight switch back to
* an interrupted LWP (referred to as the "pinned" LWP) from
@@ -797,7 +790,6 @@
*/
bne a2, 3f /* yes, go handle it */
/* no, normal context switch */
-#endif /* __HAVE_FAST_SOFTINTS */
/* Switch to the new PCB. */
ldq a0, L_MD_PCBPADDR(s2)
@@ -840,7 +832,6 @@
RET
-#ifdef __HAVE_FAST_SOFTINTS
3: /*
* Registers right now:
*
@@ -855,7 +846,6 @@
stq sp, PCB_HWPCB_KSP(a3) /* save old SP */
ldq sp, PCB_HWPCB_KSP(a2) /* restore new SP */
br 1b /* finish up */
-#endif /* __HAVE_FAST_SOFTINTS */
END(cpu_switchto)
/*
diff -r 7fd1c37c92f0 -r e3a7e95acf3c sys/arch/alpha/include/intr.h
--- a/sys/arch/alpha/include/intr.h Wed Sep 16 21:24:30 2020 +0000
+++ b/sys/arch/alpha/include/intr.h Thu Sep 17 00:48:56 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.76 2020/09/16 04:07:32 thorpej Exp $ */
+/* $NetBSD: intr.h,v 1.77 2020/09/17 00:48:56 thorpej Exp $ */
/*-
* Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc.
@@ -155,11 +155,9 @@
#include <sys/spl.h>
-#ifdef __HAVE_FAST_SOFTINTS
/* Fast soft interrupt dispatch. */
void alpha_softint_dispatch(int);
void alpha_softint_switchto(struct lwp *, int, struct lwp *);
-#endif /* __HAVE_FAST_SOFTINTS */
/*
* Interprocessor interrupts. In order how we want them processed.
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