[src/trunk]: src/sys/arch/powerpc/ibm4xx According to "PPC405GP Embedded Proc...

[rin <rin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/42a6d0d5204f
branches:  trunk
changeset: 960828:42a6d0d5204f
user:      rin <rin%NetBSD.org@localhost>
date:      Tue Mar 30 02:27:00 2021 +0000

description:
According to "PPC405GP Embedded Processor User’s Manual",
405GP has 16KB instruction cache, not 8KB.

diffstat:

 sys/arch/powerpc/ibm4xx/cpu.c |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (27 lines):

diff -r 990f1db4aabb -r 42a6d0d5204f sys/arch/powerpc/ibm4xx/cpu.c
--- a/sys/arch/powerpc/ibm4xx/cpu.c     Tue Mar 30 02:25:24 2021 +0000
+++ b/sys/arch/powerpc/ibm4xx/cpu.c     Tue Mar 30 02:27:00 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.36 2021/03/05 07:11:24 rin Exp $     */
+/*     $NetBSD: cpu.c,v 1.37 2021/03/30 02:27:00 rin Exp $     */
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.36 2021/03/05 07:11:24 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.37 2021/03/30 02:27:00 rin Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -176,7 +176,7 @@
                .ci = {
                        .dcache_size = 8192,
                        .dcache_line_size = 32,
-                       .icache_size = 8192,
+                       .icache_size = 16384,
                        .icache_line_size = 32,
                }
        }, {