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[src/trunk]: src/sys/dev/pci/ixgbe Fix a bug that INTx is disabled if the INT...
details: https://anonhg.NetBSD.org/src/rev/d0aaab85ea01
branches: trunk
changeset: 958116:d0aaab85ea01
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Thu Dec 24 18:32:53 2020 +0000
description:
Fix a bug that INTx is disabled if the INTx line is shared with other device.
ixgbe.c rev. 1.264 was not correct.
Restore EIMS before return. To read ECIR, clearing EIMC is required for
an errata, so
0) save the original EIMS value
1) clear EIMS
2) read EICR
3) restore with the saved value.
diffstat:
sys/dev/pci/ixgbe/ixgbe.c | 10 ++++++++--
1 files changed, 8 insertions(+), 2 deletions(-)
diffs (33 lines):
diff -r 6ffb2e2b6e03 -r d0aaab85ea01 sys/dev/pci/ixgbe/ixgbe.c
--- a/sys/dev/pci/ixgbe/ixgbe.c Thu Dec 24 15:51:33 2020 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.c Thu Dec 24 18:32:53 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.268 2020/12/24 15:51:33 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.269 2020/12/24 18:32:53 msaitoh Exp $ */
/******************************************************************************
@@ -5161,9 +5161,14 @@
bool more = false;
bool reenable_intr = true;
u32 eicr, eicr_mask;
+ u32 eims_orig;
u32 task_requests = 0;
- /* Silicon errata #26 on 82598. Disable all interrupts */
+ eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS);
+ /*
+ * Silicon errata #26 on 82598. Disable all interrupts before reading
+ * EICR.
+ */
IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
/* Read and clear EICR */
@@ -5173,6 +5178,7 @@
++que->irqs.ev_count;
if (eicr == 0) {
adapter->stats.pf.intzero.ev_count++;
+ IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig);
return 0;
}
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