[src/trunk]: src/sys/arch/aarch64/include fixed mask width of DBGWVR_MASK, an...

[ryo <ryo%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/511167019f8c
branches:  trunk
changeset: 960153:511167019f8c
user:      ryo <ryo%NetBSD.org@localhost>
date:      Tue Mar 09 16:41:43 2021 +0000

description:
fixed mask width of DBGWVR_MASK, and added definition of DBGBVR_MASK

diffstat:

 sys/arch/aarch64/include/armreg.h |  6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diffs (27 lines):

diff -r bc8e6b6ed0eb -r 511167019f8c sys/arch/aarch64/include/armreg.h
--- a/sys/arch/aarch64/include/armreg.h Tue Mar 09 16:40:59 2021 +0000
+++ b/sys/arch/aarch64/include/armreg.h Tue Mar 09 16:41:43 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.54 2020/09/30 08:40:49 ryo Exp $ */
+/* $NetBSD: armreg.h,v 1.55 2021/03/09 16:41:43 ryo Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -1087,6 +1087,8 @@
 AARCH64REG_READ_INLINE(dbgbvr15_el1) // Debug Breakpoint Value Register 15
 AARCH64REG_WRITE_INLINE(dbgbvr15_el1)
 
+#define        DBGBVR_MASK              __BITS(63,2)
+
 AARCH64REG_READ_INLINE(dbgwcr0_el1) // Debug Watchpoint Control Register 0
 AARCH64REG_WRITE_INLINE(dbgwcr0_el1)
 AARCH64REG_READ_INLINE(dbgwcr1_el1) // Debug Watchpoint Control Register 1
@@ -1163,7 +1165,7 @@
 AARCH64REG_READ_INLINE(dbgwvr15_el1) // Debug Watchpoint Value Register 15
 AARCH64REG_WRITE_INLINE(dbgwvr15_el1)
 
-#define        DBGWVR_MASK              __BITS(64,3)
+#define        DBGWVR_MASK              __BITS(63,2)
 
 
 AARCH64REG_READ_INLINE(mdscr_el1) // Monitor Debug System Control Register