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[src/trunk]: src/sys/arch/arm/broadcom RPI4 PCIe driver, based on pcihost_fdt.c
details: https://anonhg.NetBSD.org/src/rev/f8891f1d50d1
branches: trunk
changeset: 960107:f8891f1d50d1
user: mlelstv <mlelstv%NetBSD.org@localhost>
date: Mon Mar 08 13:49:01 2021 +0000
description:
RPI4 PCIe driver, based on pcihost_fdt.c
diffstat:
sys/arch/arm/broadcom/bcm2838_pcie.c | 872 +++++++++++++++++++++++++++++++++++
sys/arch/arm/broadcom/bcm2838_pcie.h | 140 +++++
2 files changed, 1012 insertions(+), 0 deletions(-)
diffs (truncated from 1020 to 300 lines):
diff -r 0da402071ce5 -r f8891f1d50d1 sys/arch/arm/broadcom/bcm2838_pcie.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/broadcom/bcm2838_pcie.c Mon Mar 08 13:49:01 2021 +0000
@@ -0,0 +1,872 @@
+/* $NetBSD: bcm2838_pcie.c,v 1.1 2021/03/08 13:49:01 mlelstv Exp $ */
+
+/*-
+ * Copyright (c) 2020 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Michael van Elst
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: bcm2838_pcie.c,v 1.1 2021/03/08 13:49:01 mlelstv Exp $");
+
+#include <sys/param.h>
+#include <sys/device.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pciconf.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#include <arch/arm/pci/pci_msi_machdep.h>
+#include <arch/arm/broadcom/bcm2838_pcie.h>
+
+#include <arch/evbarm/rpi/vcprop.h>
+#include <dev/pci/pcidevs.h>
+
+#define PHYS_HI_RELO __BIT(31)
+#define PHYS_HI_PREFETCH __BIT(30)
+#define PHYS_HI_ALIASED __BIT(29)
+#define PHYS_HI_SPACE __BITS(25,24)
+#define PHYS_HI_SPACE_CFG 0
+#define PHYS_HI_SPACE_IO 1
+#define PHYS_HI_SPACE_MEM32 2
+#define PHYS_HI_SPACE_MEM64 3
+
+#define CFG_OFFSET(b,d,f,r) ((b) << 16 | (d) << 1 | (f) << 8 | (r))
+
+struct bcmstb_busspace {
+ struct bus_space bst;
+ int (*map)(void *, bus_addr_t, bus_size_t,
+ int, bus_space_handle_t *);
+ int flags;
+ struct {
+ bus_addr_t bpci;
+ bus_addr_t bbus;
+ bus_size_t size;
+ } ranges[4];
+ size_t nranges;
+};
+
+struct bcmstb_softc {
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+ bus_dma_tag_t sc_dmat;
+
+ kmutex_t sc_lock;
+ const char *sc_name;
+
+ int sc_phandle;
+
+ uint32_t sc_bus_min;
+ uint32_t sc_bus_max;
+
+ struct arm32_pci_chipset sc_pc;
+
+ struct bcmstb_busspace sc_io;
+ struct bcmstb_busspace sc_mem;
+
+ int sc_pci_flags;
+};
+
+static void bcmstb_attach(device_t, struct bcmstb_softc *);
+static int bcmstb_config(struct bcmstb_softc *);
+static int bcmstb_setup(struct bcmstb_softc *);
+static void bcmstb_attach_hook(device_t, device_t, struct pcibus_attach_args *);
+static int bcmstb_bus_maxdevs(void *, int);
+static pcitag_t bcmstb_make_tag(void *, int, int, int);
+static void bcmstb_decompose_tag(void *, pcitag_t, int *, int *, int *);
+static u_int bcmstb_get_segment(void *);
+static pcireg_t bcmstb_conf_read(void *, pcitag_t, int);
+static void bcmstb_conf_write(void *, pcitag_t, int, pcireg_t);
+static int bcmstb_conf_hook(void *, int, int, int, pcireg_t);
+static void bcmstb_conf_interrupt(void *, int, int, int, int, int *);
+
+static int bcmstb_intr_map(const struct pci_attach_args *, pci_intr_handle_t *);
+static const char *bcmstb_intr_string(void *, pci_intr_handle_t, char *, size_t);
+static const struct evcnt *bcmstb_intr_evcnt(void *, pci_intr_handle_t);
+static int bcmstb_intr_setattr(void *, pci_intr_handle_t *, int, uint64_t);
+static void *bcmstb_intr_establish(void *, pci_intr_handle_t, int,
+ int (*)(void *), void *, const char *);
+static void bcmstb_intr_disestablish(void *, void *);
+static int bcmstb_bus_space_map(void *, bus_addr_t,
+ bus_size_t, int, bus_space_handle_t *);
+
+struct bcm2838pcie_softc {
+ device_t sc_dev;
+ struct bcmstb_softc sc_bcmstb;
+};
+
+static int bcm2838pcie_match(device_t, cfdata_t, void *);
+static void bcm2838pcie_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(bcm2838pcie_fdt, sizeof(struct bcm2838pcie_softc),
+ bcm2838pcie_match, bcm2838pcie_attach, NULL, NULL);
+
+
+static inline void
+stb_write(struct bcmstb_softc *sc, int r, uint32_t v)
+{
+ bus_space_write_4(sc->sc_bst, sc->sc_bsh, r, v);
+}
+static inline uint32_t
+stb_read(struct bcmstb_softc *sc, int r)
+{
+ uint32_t v;
+
+ v = bus_space_read_4(sc->sc_bst, sc->sc_bsh, r);
+
+ return v;
+}
+static inline void
+stb_setbits(struct bcmstb_softc *sc, int r, uint32_t clr, uint32_t set)
+{
+ uint32_t w;
+
+ w = stb_read(sc, r);
+ w = (w & ~clr) | set;
+ stb_write(sc, r, w);
+}
+#define STBWRITE(sc, r, v) stb_write((sc), (r), (v))
+#define STBREAD(sc, r) stb_read((sc), (r))
+#define STBRMW(sc, r, c, s) stb_setbits((sc), (r), (c), (s))
+
+static const struct device_compatible_entry compat_data[] = {
+ { .compat = "brcm,pci-plat-dev" },
+ DEVICE_COMPAT_EOL
+};
+
+/* ARGSUSED */
+static int
+bcm2838pcie_match(device_t parent, cfdata_t match, void *aux)
+{
+ struct fdt_attach_args * const faa = aux;
+
+ return of_compatible_match(faa->faa_phandle, compat_data);
+}
+
+static void
+bcm2838pcie_attach(device_t parent, device_t self, void *aux)
+{
+ struct bcm2838pcie_softc *sc = device_private(self);
+ struct fdt_attach_args * const faa = aux;
+ bus_addr_t addr;
+ bus_size_t size;
+ bus_dma_tag_t dmat;
+ bus_space_tag_t bst;
+ bus_space_handle_t bsh;
+ int error;
+
+ sc->sc_dev = self;
+
+ mutex_init(&sc->sc_bcmstb.sc_lock, MUTEX_DEFAULT, IPL_HIGH);
+
+ error = fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size);
+ if (error) {
+ aprint_error_dev(sc->sc_dev, ": couldn't get registers\n");
+ return;
+ }
+
+ // bst = faa->faa_bst;
+ extern struct bus_space arm_generic_bs_tag;
+ bst = &arm_generic_bs_tag;
+
+ if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) {
+ aprint_error_dev(sc->sc_dev, ": unable to map device\n");
+ return;
+ }
+
+ /* RPI4 limits PCIe DMA to the first 3GB */
+ error = bus_dmatag_subregion(faa->faa_dmat, 0, 0xbfffffff,
+ &dmat, BUS_DMA_WAITOK);
+
+ if (error == EOPNOTSUPP) {
+ /* assume default DMA tag is fine */
+ dmat = faa->faa_dmat;
+ } else if (error) {
+ aprint_error_dev(sc->sc_dev, ": unable to subregion DMA\n");
+ bus_space_unmap(faa->faa_bst, bsh, size);
+ return;
+ }
+
+ aprint_naive("\n");
+ aprint_normal(": Broadcom PCIE Host Controller\n");
+
+ if (error == 0)
+ aprint_normal_dev(sc->sc_dev, "Using 3GB DMA subregion\n");
+
+ sc->sc_bcmstb.sc_bst = bst;
+ sc->sc_bcmstb.sc_bsh = bsh;
+ sc->sc_bcmstb.sc_dmat = dmat;
+ sc->sc_bcmstb.sc_name = device_xname(sc->sc_dev);
+ sc->sc_bcmstb.sc_phandle = faa->faa_phandle;
+
+ bcmstb_attach(sc->sc_dev, &sc->sc_bcmstb);
+}
+
+static void
+bcmstb_attach(device_t self, struct bcmstb_softc *sc)
+{
+ struct arm32_pci_chipset *pc;
+ struct pcibus_attach_args pba;
+ int error;
+
+ // fdtbus_register_interrupt_controller(self, OF_child(sc->sc_phandle),
+ // &bcmstb_intrfuncs);
+
+ pc = &sc->sc_pc;
+
+ pc->pc_conf_v = (void *)sc;
+ pc->pc_attach_hook = bcmstb_attach_hook;
+ pc->pc_bus_maxdevs = bcmstb_bus_maxdevs;
+ pc->pc_make_tag = bcmstb_make_tag;
+ pc->pc_decompose_tag = bcmstb_decompose_tag;
+ pc->pc_get_segment = bcmstb_get_segment;
+ pc->pc_conf_read = bcmstb_conf_read;
+ pc->pc_conf_write = bcmstb_conf_write;
+ pc->pc_conf_hook = bcmstb_conf_hook;
+ pc->pc_conf_interrupt = bcmstb_conf_interrupt;
+
+ pc->pc_intr_v = (void *)sc;
+ pc->pc_intr_map = bcmstb_intr_map;
+ pc->pc_intr_string = bcmstb_intr_string;
+ pc->pc_intr_evcnt = bcmstb_intr_evcnt;
+ pc->pc_intr_setattr = bcmstb_intr_setattr;
+ pc->pc_intr_establish = bcmstb_intr_establish;
+ pc->pc_intr_disestablish = bcmstb_intr_disestablish;
+
+
+ /* XXX bus-range */
+ sc->sc_bus_min = 0x00;
+ sc->sc_bus_max = 0x01;
+
+ error = bcmstb_config(sc);
+ if (error) {
+ aprint_error_dev(self, "configuration failed: %d\n", error);
+ return;
+ }
+
+ memset(&pba, 0, sizeof(pba));
+ pba.pba_flags = sc->sc_pci_flags;
+ pba.pba_iot = &sc->sc_io.bst;
+ pba.pba_memt = &sc->sc_mem.bst;
+ pba.pba_dmat = sc->sc_dmat;
+#ifdef _PCI_HAVE_DMA64
+ pba.pba_dmat64 = sc->sc_dmat;
+#endif
+ pba.pba_pc = pc;
+ pba.pba_bus = sc->sc_bus_min;
+
+ config_found_ia(self, "pcibus", &pba, pcibusprint);
+}
+
+static void
+bcmstb_makespace(struct bcmstb_softc *sc, struct bcmstb_busspace *bs, int flags)
+{
+ bs->bst = *sc->sc_bst;
+ bs->bst.bs_cookie = bs;
+ bs->map = bs->bst.bs_map;
+ bs->bst.bs_map = bcmstb_bus_space_map;
+ bs->flags = flags;
+}
+
+static int
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