Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/dev/pci Update rge(4) from older OpenBSD, finish porting.
details: https://anonhg.NetBSD.org/src/rev/7b3e2ca156f3
branches: trunk
changeset: 959938:7b3e2ca156f3
user: jakllsch <jakllsch%NetBSD.org@localhost>
date: Mon Mar 01 17:48:52 2021 +0000
description:
Update rge(4) from older OpenBSD, finish porting.
Should consider merging this all into re(4) and rgephy(4) someday.
Some cleanup tasks remain here.
diffstat:
sys/dev/pci/files.pci | 7 +-
sys/dev/pci/if_rge.c | 1122 ++++++++++----
sys/dev/pci/if_rgereg.h | 3428 ++++++++++++++++++++++++++++++++++++++++++++--
3 files changed, 4046 insertions(+), 511 deletions(-)
diffs (truncated from 5363 to 300 lines):
diff -r bd78064438f7 -r 7b3e2ca156f3 sys/dev/pci/files.pci
--- a/sys/dev/pci/files.pci Mon Mar 01 17:41:00 2021 +0000
+++ b/sys/dev/pci/files.pci Mon Mar 01 17:48:52 2021 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.pci,v 1.434 2021/02/17 08:15:43 knakahara Exp $
+# $NetBSD: files.pci,v 1.435 2021/03/01 17:48:52 jakllsch Exp $
#
# Config file and device description for machine-independent PCI code.
# Included by ports that need it. Requires that the SCSI files be
@@ -1183,3 +1183,8 @@
attach vmx at pci
file dev/pci/if_vmx.c vmx
+# Realtek RTL8125 2.5GBASE-T Ethernet
+device rge: ether, ifnet, arp, mii
+attach rge at pci
+file dev/pci/if_rge.c rge
+
diff -r bd78064438f7 -r 7b3e2ca156f3 sys/dev/pci/if_rge.c
--- a/sys/dev/pci/if_rge.c Mon Mar 01 17:41:00 2021 +0000
+++ b/sys/dev/pci/if_rge.c Mon Mar 01 17:48:52 2021 +0000
@@ -1,8 +1,8 @@
-/* $NetBSD: if_rge.c,v 1.16 2021/01/27 14:25:22 jakllsch Exp $ */
-/* $OpenBSD: if_rge.c,v 1.4 2020/07/10 13:26:38 patrick Exp $ */
+/* $NetBSD: if_rge.c,v 1.17 2021/03/01 17:48:52 jakllsch Exp $ */
+/* $OpenBSD: if_rge.c,v 1.9 2020/12/12 11:48:53 jan Exp $ */
/*
- * Copyright (c) 2019 Kevin Lo <kevlo%openbsd.org@localhost>
+ * Copyright (c) 2019, 2020 Kevin Lo <kevlo%openbsd.org@localhost>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -18,9 +18,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_rge.c,v 1.16 2021/01/27 14:25:22 jakllsch Exp $");
-
-/* #include "vlan.h" Sevan */
+__KERNEL_RCSID(0, "$NetBSD: if_rge.c,v 1.17 2021/03/01 17:48:52 jakllsch Exp $");
#include <sys/types.h>
@@ -46,9 +44,7 @@
#include <netinet/in.h>
#include <net/if_ether.h>
-#if NBPFILTER > 0
#include <net/bpf.h>
-#endif
#include <sys/bus.h>
#include <machine/intr.h>
@@ -64,16 +60,10 @@
#ifdef __NetBSD__
#define letoh32 htole32
#define nitems(x) __arraycount(x)
-#define MBUF_LIST_INITIALIZER() { NULL, NULL, 0 }
-struct mbuf_list {
- struct mbuf *ml_head;
- struct mbuf *ml_tail;
- u_int ml_len;
-};
static struct mbuf *
-MCLGETI(struct rge_softc *sc __unused, int how,
- struct ifnet *ifp __unused, u_int size)
+MCLGETL(struct rge_softc *sc __unused, int how,
+ u_int size)
{
struct mbuf *m;
@@ -97,6 +87,13 @@
#endif
#endif
+#ifdef RGE_DEBUG
+#define DPRINTF(x) do { if (rge_debug > 0) printf x; } while (0)
+int rge_debug = 0;
+#else
+#define DPRINTF(x)
+#endif
+
static int rge_match(device_t, cfdata_t, void *);
static void rge_attach(device_t, device_t, void *);
int rge_intr(void *);
@@ -105,7 +102,7 @@
void rge_start(struct ifnet *);
void rge_watchdog(struct ifnet *);
int rge_init(struct ifnet *);
-void rge_stop(struct ifnet *);
+void rge_stop(struct ifnet *, int);
int rge_ifmedia_upd(struct ifnet *);
void rge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
int rge_allocmem(struct rge_softc *);
@@ -119,6 +116,11 @@
void rge_iff(struct rge_softc *);
void rge_set_phy_power(struct rge_softc *, int);
void rge_phy_config(struct rge_softc *);
+void rge_phy_config_mac_cfg2(struct rge_softc *);
+void rge_phy_config_mac_cfg3(struct rge_softc *);
+void rge_phy_config_mac_cfg4(struct rge_softc *);
+void rge_phy_config_mac_cfg5(struct rge_softc *);
+void rge_phy_config_mcu(struct rge_softc *, uint16_t);
void rge_set_macaddr(struct rge_softc *, const uint8_t *);
void rge_get_macaddr(struct rge_softc *, uint8_t *);
void rge_hw_init(struct rge_softc *);
@@ -126,6 +128,7 @@
void rge_patch_phy_mcu(struct rge_softc *, int);
void rge_add_media_types(struct rge_softc *);
void rge_config_imtype(struct rge_softc *, int);
+void rge_disable_hw_im(struct rge_softc *);
void rge_disable_sim_im(struct rge_softc *);
void rge_setup_sim_im(struct rge_softc *);
void rge_setup_intr(struct rge_softc *, int);
@@ -135,7 +138,9 @@
void rge_write_mac_ocp(struct rge_softc *, uint16_t, uint16_t);
uint16_t rge_read_mac_ocp(struct rge_softc *, uint16_t);
void rge_write_ephy(struct rge_softc *, uint16_t, uint16_t);
+uint16_t rge_read_ephy(struct rge_softc *, uint16_t);
void rge_write_phy(struct rge_softc *, uint16_t, uint16_t, uint16_t);
+uint16_t rge_read_phy(struct rge_softc *, uint16_t, uint16_t);
void rge_write_phy_ocp(struct rge_softc *, uint16_t, uint16_t);
uint16_t rge_read_phy_ocp(struct rge_softc *, uint16_t);
int rge_get_link_status(struct rge_softc *);
@@ -146,23 +151,19 @@
static const struct {
uint16_t reg;
uint16_t val;
-} rtl8125_def_bps[] = {
- RTL8125_DEF_BPS
-}, rtl8125_mac_cfg2_ephy[] = {
- RTL8125_MAC_CFG2_EPHY
-}, rtl8125_mac_cfg2_mcu[] = {
+} rtl8125_mac_cfg2_mcu[] = {
RTL8125_MAC_CFG2_MCU
-}, rtl8125_mac_cfg3_ephy[] = {
- RTL8125_MAC_CFG3_EPHY
}, rtl8125_mac_cfg3_mcu[] = {
RTL8125_MAC_CFG3_MCU
+}, rtl8125_mac_cfg4_mcu[] = {
+ RTL8125_MAC_CFG4_MCU
+}, rtl8125_mac_cfg5_mcu[] = {
+ RTL8125_MAC_CFG5_MCU
};
CFATTACH_DECL_NEW(rge, sizeof(struct rge_softc), rge_match, rge_attach,
NULL, NULL); /* Sevan - detach function? */
-extern struct cfdriver rge_cd;
-
static const struct {
pci_vendor_id_t vendor;
pci_product_id_t product;
@@ -180,7 +181,7 @@
for (n =0; n < __arraycount(rge_devices); n++) {
if (PCI_VENDOR(pa->pa_id) == rge_devices[n].vendor &&
PCI_PRODUCT(pa->pa_id) == rge_devices[n].product)
- return 1;
+ return 3;
}
return 0;
@@ -192,7 +193,7 @@
struct rge_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
- pci_intr_handle_t ih;
+ pci_intr_handle_t *ihp;
char intrbuf[PCI_INTRSTR_LEN];
const char *intrstr = NULL;
struct ifnet *ifp;
@@ -200,11 +201,14 @@
uint32_t hwrev;
uint8_t eaddr[ETHER_ADDR_LEN];
int offset;
+ pcireg_t command;
pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0);
sc->sc_dev = self;
+ pci_aprint_devinfo(pa, "Ethernet controller");
+
/*
* Map control/status registers.
*/
@@ -223,17 +227,29 @@
}
}
+ int counts[PCI_INTR_TYPE_SIZE] = {
+ [PCI_INTR_TYPE_INTX] = 1,
+ [PCI_INTR_TYPE_MSI] = 1,
+ [PCI_INTR_TYPE_MSIX] = 1,
+ };
+ int max_type = PCI_INTR_TYPE_MSIX;
/*
* Allocate interrupt.
*/
- if (pci_intr_map(pa, &ih) == 0)
- sc->rge_flags |= RGE_FLAG_MSI;
- else if (pci_intr_map(pa, &ih) != 0) {
+ if (pci_intr_alloc(pa, &ihp, counts, max_type) != 0) {
aprint_error(": couldn't map interrupt\n");
return;
}
- intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
- sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_NET, rge_intr,
+ switch (pci_intr_type(pc, ihp[0])) {
+ case PCI_INTR_TYPE_MSIX:
+ case PCI_INTR_TYPE_MSI:
+ sc->rge_flags |= RGE_FLAG_MSI;
+ break;
+ default:
+ break;
+ }
+ intrstr = pci_intr_string(pc, ihp[0], intrbuf, sizeof(intrbuf));
+ sc->sc_ih = pci_intr_establish_xname(pc, ihp[0], IPL_NET, rge_intr,
sc, device_xname(sc->sc_dev));
if (sc->sc_ih == NULL) {
aprint_error_dev(sc->sc_dev, ": couldn't establish interrupt");
@@ -261,6 +277,12 @@
case 0x60900000:
sc->rge_type = MAC_CFG3;
break;
+ case 0x64000000:
+ sc->rge_type = MAC_CFG4;
+ break;
+ case 0x64100000:
+ sc->rge_type = MAC_CFG5;
+ break;
default:
aprint_error(": unknown version 0x%08x\n", hwrev);
return;
@@ -273,10 +295,11 @@
*/
if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
&offset, NULL)) {
- /* Disable PCIe ASPM. */
+ /* Disable PCIe ASPM and ECPM. */
reg = pci_conf_read(pa->pa_pc, pa->pa_tag,
offset + PCIE_LCSR);
- reg &= ~(PCIE_LCSR_ASPM_L0S | PCIE_LCSR_ASPM_L1 );
+ reg &= ~(PCIE_LCSR_ASPM_L0S | PCIE_LCSR_ASPM_L1 |
+ PCIE_LCSR_ENCLKPM);
pci_conf_write(pa->pa_pc, pa->pa_tag, offset + PCIE_LCSR,
reg);
}
@@ -304,24 +327,30 @@
ifp->if_xflags = IFEF_MPSAFE;
#endif
ifp->if_ioctl = rge_ioctl;
+ ifp->if_stop = rge_stop;
ifp->if_start = rge_start;
+ ifp->if_init = rge_init;
ifp->if_watchdog = rge_watchdog;
- ifq_set_maxlen(&ifp->if_snd, RGE_TX_LIST_CNT);
- ifp->if_mtu = RGE_JUMBO_MTU;
+ IFQ_SET_MAXLEN(&ifp->if_snd, RGE_TX_LIST_CNT - 1);
- ifp->if_capabilities = ETHERCAP_VLAN_MTU | IFCAP_CSUM_IPv4_Rx |
+#if notyet
+ ifp->if_capabilities = IFCAP_CSUM_IPv4_Rx |
IFCAP_CSUM_IPv4_Tx |IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_TCPv4_Tx|
IFCAP_CSUM_UDPv4_Rx | IFCAP_CSUM_UDPv4_Tx;
+#endif
-#if NVLAN > 0
- ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
-#endif
+ sc->sc_ec.ec_capabilities |= ETHERCAP_VLAN_MTU;
+ sc->sc_ec.ec_capabilities |= ETHERCAP_VLAN_HWTAGGING;
callout_init(&sc->sc_timeout, CALLOUT_FLAGS);
callout_setfunc(&sc->sc_timeout, rge_tick, sc);
- rge_txstart(&sc->sc_task, sc);
+
+ command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
+ command |= PCI_COMMAND_MASTER_ENABLE;
+ pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
/* Initialize ifmedia structures. */
+ sc->sc_ec.ec_ifmedia = &sc->sc_media;
ifmedia_init(&sc->sc_media, IFM_IMASK, rge_ifmedia_upd,
rge_ifmedia_sts);
rge_add_media_types(sc);
@@ -347,11 +376,12 @@
/* Disable interrupts. */
RGE_WRITE_4(sc, RGE_IMR, 0);
- status = RGE_READ_4(sc, RGE_ISR);
if (!(sc->rge_flags & RGE_FLAG_MSI)) {
- if ((status & RGE_INTRS) == 0 || status == 0xffffffff)
+ if ((RGE_READ_4(sc, RGE_ISR) & sc->rge_intrs) == 0)
return (0);
}
+
+ status = RGE_READ_4(sc, RGE_ISR);
Home |
Main Index |
Thread Index |
Old Index