[src/trunk]: src/sys/arch/aarch64/aarch64 Don't trap EL0 accesses to the DCC ...

[ryo <ryo%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/19e75b754923
branches:  trunk
changeset: 956121:19e75b754923
user:      ryo <ryo%NetBSD.org@localhost>
date:      Thu Oct 22 07:16:06 2020 +0000

description:
Don't trap EL0 accesses to the DCC registers.
VMWare use "mrs xzr, mdccsr_el0" for guest side backdoor.

diffstat:

 sys/arch/aarch64/aarch64/locore.S |  14 ++++----------
 1 files changed, 4 insertions(+), 10 deletions(-)

diffs (42 lines):

diff -r 6d0dc9ad179b -r 19e75b754923 sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Thu Oct 22 07:12:13 2020 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Thu Oct 22 07:16:06 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.73 2020/09/15 09:28:20 ryo Exp $  */
+/*     $NetBSD: locore.S,v 1.74 2020/10/22 07:16:06 ryo Exp $  */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.73 2020/09/15 09:28:20 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.74 2020/10/22 07:16:06 ryo Exp $")
 
 #ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
@@ -241,9 +241,8 @@
 init_sysregs:
        stp     x0, lr, [sp, #-16]!
 
-       /* init debug event */
-       ldr     x0, mdscr_setting
-       msr     mdscr_el1, x0
+       /* init debug registers */
+       msr     mdscr_el1, xzr
        msr     oslar_el1, xzr
 
        /* Clear context id register */
@@ -1041,11 +1040,6 @@
            SCTLR_EnDB |    /* PACDB (APDBKey_EL1) instruction enable */ \
            0)
 
-mdscr_setting:
-       .quad ( \
-           MDSCR_TDCC |    /* Trap Debug Communications Channel access */ \
-           0)
-
 .L_devmap_addr:
        .quad   VM_KERNEL_IO_ADDRESS