Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[xsrc/trunk]: xsrc/external/mit/libdrm/dist initial import of libdrm-2.4.105
details: https://anonhg.NetBSD.org/xsrc/rev/4e73141a4d5c
branches: trunk
changeset: 10697:4e73141a4d5c
user: mrg <mrg%NetBSD.org@localhost>
date: Tue Apr 27 03:01:48 2021 +0000
description:
initial import of libdrm-2.4.105
diffstat:
external/mit/libdrm/dist/amdgpu/amdgpu-symbols.txt | 1 +
external/mit/libdrm/dist/amdgpu/amdgpu.h | 17 +
external/mit/libdrm/dist/amdgpu/amdgpu_gpu_info.c | 15 +
external/mit/libdrm/dist/amdgpu/meson.build | 4 +-
external/mit/libdrm/dist/core-symbols.txt | 1 +
external/mit/libdrm/dist/data/amdgpu.ids | 67 +
external/mit/libdrm/dist/etnaviv/meson.build | 2 +-
external/mit/libdrm/dist/exynos/meson.build | 2 +-
external/mit/libdrm/dist/freedreno/meson.build | 2 +-
external/mit/libdrm/dist/include/drm/amdgpu_drm.h | 78 ++-
external/mit/libdrm/dist/include/drm/drm_fourcc.h | 507 ++++++++++++++-
external/mit/libdrm/dist/include/drm/drm_mode.h | 147 ++++-
external/mit/libdrm/dist/intel/i915_pciids.h | 190 +++--
external/mit/libdrm/dist/intel/intel_chipset.c | 4 +
external/mit/libdrm/dist/intel/meson.build | 2 +-
external/mit/libdrm/dist/libkms/meson.build | 2 +-
external/mit/libdrm/dist/man/drm-kms.7.rst | 229 ++++++
external/mit/libdrm/dist/man/drm-memory.7.rst | 322 +++++++++
external/mit/libdrm/dist/man/drm.7.rst | 91 ++
external/mit/libdrm/dist/man/drmAvailable.3.rst | 41 +
external/mit/libdrm/dist/man/drmHandleEvent.3.rst | 62 +
external/mit/libdrm/dist/man/drmModeGetResources.3.rst | 92 ++
external/mit/libdrm/dist/man/meson.build | 57 +-
external/mit/libdrm/dist/meson.build | 18 +-
external/mit/libdrm/dist/nouveau/meson.build | 2 +-
external/mit/libdrm/dist/omap/meson.build | 2 +-
external/mit/libdrm/dist/radeon/meson.build | 2 +-
external/mit/libdrm/dist/tegra/meson.build | 2 +-
external/mit/libdrm/dist/tests/amdgpu/amdgpu_test.c | 19 +-
external/mit/libdrm/dist/tests/amdgpu/amdgpu_test.h | 53 +
external/mit/libdrm/dist/tests/amdgpu/basic_tests.c | 237 ++++++-
external/mit/libdrm/dist/tests/amdgpu/bo_tests.c | 4 +-
external/mit/libdrm/dist/tests/amdgpu/cs_tests.c | 6 +-
external/mit/libdrm/dist/tests/amdgpu/deadlock_tests.c | 10 +
external/mit/libdrm/dist/tests/amdgpu/decode_messages.h | 4 +-
external/mit/libdrm/dist/tests/amdgpu/meson.build | 2 +-
external/mit/libdrm/dist/tests/amdgpu/security_tests.c | 485 ++++++++++++++
external/mit/libdrm/dist/tests/amdgpu/syncobj_tests.c | 2 +-
external/mit/libdrm/dist/tests/amdgpu/vce_tests.c | 6 +-
external/mit/libdrm/dist/tests/amdgpu/vcn_tests.c | 51 +-
external/mit/libdrm/dist/tests/amdgpu/vm_tests.c | 12 +-
external/mit/libdrm/dist/tests/etnaviv/etnaviv_2d_test.c | 70 +-
external/mit/libdrm/dist/tests/util/kms.c | 3 +
external/mit/libdrm/dist/tests/util/pattern.c | 5 +-
44 files changed, 2693 insertions(+), 237 deletions(-)
diffs (truncated from 4144 to 300 lines):
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/amdgpu/amdgpu-symbols.txt
--- a/external/mit/libdrm/dist/amdgpu/amdgpu-symbols.txt Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/amdgpu/amdgpu-symbols.txt Tue Apr 27 03:01:48 2021 +0000
@@ -66,6 +66,7 @@
amdgpu_query_hw_ip_info
amdgpu_query_info
amdgpu_query_sensor_info
+amdgpu_query_video_caps_info
amdgpu_read_mm_registers
amdgpu_va_range_alloc
amdgpu_va_range_free
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/amdgpu/amdgpu.h
--- a/external/mit/libdrm/dist/amdgpu/amdgpu.h Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/amdgpu/amdgpu.h Tue Apr 27 03:01:48 2021 +0000
@@ -1238,6 +1238,23 @@
unsigned size, void *value);
/**
+ * Query information about video capabilities
+ *
+ * The return sizeof(struct drm_amdgpu_info_video_caps)
+ *
+ * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
+ * \param caps_type - \c [in] AMDGPU_INFO_VIDEO_CAPS_DECODE(ENCODE)
+ * \param size - \c [in] Size of the returned value.
+ * \param value - \c [out] Pointer to the return value.
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_query_video_caps_info(amdgpu_device_handle dev, unsigned cap_type,
+ unsigned size, void *value);
+
+/**
* Read a set of consecutive memory-mapped registers.
* Not all registers are allowed to be read by userspace.
*
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/amdgpu/amdgpu_gpu_info.c
--- a/external/mit/libdrm/dist/amdgpu/amdgpu_gpu_info.c Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/amdgpu/amdgpu_gpu_info.c Tue Apr 27 03:01:48 2021 +0000
@@ -331,3 +331,18 @@
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
+
+drm_public int amdgpu_query_video_caps_info(amdgpu_device_handle dev, unsigned cap_type,
+ unsigned size, void *value)
+{
+ struct drm_amdgpu_info request;
+
+ memset(&request, 0, sizeof(request));
+ request.return_pointer = (uintptr_t)value;
+ request.return_size = size;
+ request.query = AMDGPU_INFO_VIDEO_CAPS;
+ request.sensor_info.type = cap_type;
+
+ return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
+ sizeof(struct drm_amdgpu_info));
+}
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/amdgpu/meson.build
--- a/external/mit/libdrm/dist/amdgpu/meson.build Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/amdgpu/meson.build Tue Apr 27 03:01:48 2021 +0000
@@ -21,7 +21,7 @@
datadir_amdgpu = join_paths(get_option('prefix'), get_option('datadir'), 'libdrm')
-libdrm_amdgpu = shared_library(
+libdrm_amdgpu = library(
'drm_amdgpu',
[
files(
@@ -36,7 +36,7 @@
],
include_directories : [inc_root, inc_drm],
link_with : libdrm,
- dependencies : [dep_pthread_stubs, dep_atomic_ops],
+ dependencies : [dep_pthread_stubs, dep_atomic_ops, dep_rt],
version : '1.0.0',
install : true,
)
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/core-symbols.txt
--- a/external/mit/libdrm/dist/core-symbols.txt Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/core-symbols.txt Tue Apr 27 03:01:48 2021 +0000
@@ -83,6 +83,7 @@
drmHashLookup
drmHashNext
drmIoctl
+drmIsKMS
drmIsMaster
drmMalloc
drmMap
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/data/amdgpu.ids
--- a/external/mit/libdrm/dist/data/amdgpu.ids Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/data/amdgpu.ids Tue Apr 27 03:01:48 2021 +0000
@@ -4,10 +4,67 @@
# device_id, revision_id, product_name <-- single tab after comma
1.0.0
+15DD, C3, AMD Radeon(TM) Vega 3 Graphics
+15DD, CB, AMD Radeon(TM) Vega 3 Graphics
+15DD, CE, AMD Radeon(TM) Vega 3 Graphics
+15DD, D8, AMD Radeon(TM) Vega 3 Graphics
+15DD, CC, AMD Radeon(TM) Vega 6 Graphics
+15DD, D9, AMD Radeon(TM) Vega 6 Graphics
+15DD, C2, AMD Radeon(TM) Vega 8 Graphics
+15DD, C4, AMD Radeon(TM) Vega 8 Graphics
+15DD, C8, AMD Radeon(TM) Vega 8 Graphics
+15DD, CA, AMD Radeon(TM) Vega 8 Graphics
+15DD, D1, AMD Radeon(TM) Vega 8 Graphics
+15DD, D5, AMD Radeon(TM) Vega 8 Graphics
+15DD, D7, AMD Radeon(TM) Vega 8 Graphics
+15DD, C3, AMD Radeon(TM) Vega 10 Graphics
+15DD, D0, AMD Radeon(TM) Vega 10 Graphics
+15DD, C1, AMD Radeon(TM) Vega 11 Graphics
+15DD, C6, AMD Radeon(TM) Vega 11 Graphics
+15DD, C9, AMD Radeon(TM) Vega 11 Graphics
+15DD, D3, AMD Radeon(TM) Vega 11 Graphics
+15DD, D6, AMD Radeon(TM) Vega 11 Graphics
15DD, 81, AMD Ryzen Embedded V1807B with Radeon Vega Gfx
15DD, 82, AMD Ryzen Embedded V1756B with Radeon Vega Gfx
15DD, 83, AMD Ryzen Embedded V1605B with Radeon Vega Gfx
15DD, 85, AMD Ryzen Embedded V1202B with Radeon Vega Gfx
+15D8, 93, AMD Radeon(TM) Vega 1 Graphics
+15D8, C4, AMD Radeon(TM) Vega 3 Graphics
+15D8, C5, AMD Radeon(TM) Vega 3 Graphics
+15D8, CC, AMD Radeon(TM) Vega 3 Graphics
+15D8, CE, AMD Radeon(TM) Vega 3 Graphics
+15D8, CF, AMD Radeon(TM) Vega 3 Graphics
+15D8, D4, AMD Radeon(TM) Vega 3 Graphics
+15D8, DC, AMD Radeon(TM) Vega 3 Graphics
+15D8, DD, AMD Radeon(TM) Vega 3 Graphics
+15D8, DE, AMD Radeon(TM) Vega 3 Graphics
+15D8, DF, AMD Radeon(TM) Vega 3 Graphics
+15D8, E3, AMD Radeon(TM) Vega 3 Graphics
+15D8, E4, AMD Radeon(TM) Vega 3 Graphics
+15D8, A3, AMD Radeon(TM) Vega 6 Graphics
+15D8, B3, AMD Radeon(TM) Vega 6 Graphics
+15D8, C3, AMD Radeon(TM) Vega 6 Graphics
+15D8, D3, AMD Radeon(TM) Vega 6 Graphics
+15D8, A2, AMD Radeon(TM) Vega 8 Graphics
+15D8, B2, AMD Radeon(TM) Vega 8 Graphics
+15D8, C2, AMD Radeon(TM) Vega 8 Graphics
+15D8, C9, AMD Radeon(TM) Vega 8 Graphics
+15D8, CB, AMD Radeon(TM) Vega 8 Graphics
+15D8, D2, AMD Radeon(TM) Vega 8 Graphics
+15D8, D9, AMD Radeon(TM) Vega 8 Graphics
+15D8, DB, AMD Radeon(TM) Vega 8 Graphics
+15D8, A1, AMD Radeon(TM) Vega 10 Graphics
+15D8, B1, AMD Radeon(TM) Vega 10 Graphics
+15D8, C1, AMD Radeon(TM) Vega 10 Graphics
+15D8, D1, AMD Radeon(TM) Vega 10 Graphics
+15D8, C8, AMD Radeon(TM) Vega 11 Graphics
+15D8, CA, AMD Radeon(TM) Vega 11 Graphics
+15D8, D8, AMD Radeon(TM) Vega 11 Graphics
+15D8, DA, AMD Radeon(TM) Vega 11 Graphics
+15D8, 91, AMD Ryzen Embedded R1606G with Radeon Vega Gfx
+15D8, 92, AMD Ryzen Embedded R1505G with Radeon Vega Gfx
+15D8, CF, AMD Ryzen Embedded R1305G with Radeon Vega Gfx
+15D8, E4, AMD Ryzen Embedded R1102G with Radeon Vega Gfx
6600, 0, AMD Radeon HD 8600/8700M
6600, 81, AMD Radeon (TM) R7 M370
6601, 0, AMD Radeon (TM) HD 8500M/8700M
@@ -45,6 +102,7 @@
6665, 83, AMD Radeon (TM) R5 M320
6667, 0, AMD Radeon R5 M200 Series
666F, 0, AMD Radeon HD 8500M
+66A1, 06, AMD Radeon (TM) Pro VII
66AF, C1, AMD Radeon VII
6780, 0, ATI FirePro V (FireGL V) Graphics Adapter
678A, 0, ATI FirePro V (FireGL V) Graphics Adapter
@@ -181,6 +239,7 @@
6985, 00, AMD Radeon Pro WX3100
6987, 80, AMD Embedded Radeon E9171
6987, C0, Radeon 550X Series
+6987, C1, AMD Radeon RX 640
6987, C3, Radeon 540X Series
6995, 00, AMD Radeon Pro WX2100
6997, 00, Radeon Pro WX2100
@@ -195,6 +254,8 @@
7300, CB, AMD Radeon (TM) R9 Fury Series
7300, CA, AMD Radeon (TM) R9 Fury Series
7312, 00, AMD Radeon Pro W5700
+731E, C6, AMD Radeon RX 5700XTB
+731E, C7, AMD Radeon RX 5700B
731F, C0, AMD Radeon RX 5700 XT 50th Anniversary
731F, C1, AMD Radeon RX 5700 XT
731F, C2, AMD Radeon RX 5600M
@@ -206,8 +267,13 @@
7340, C1, Radeon RX 5500M
7340, C5, Radeon RX 5500 XT
7340, C7, Radeon RX 5500
+7340, C9, AMD Radeon RX 5500XTB
+7340, CF, Radeon RX 5300
7341, 00, AMD Radeon Pro W5500
7347, 00, AMD Radeon Pro W5500M
+73BF, C0, AMD Radeon RX 6900 XT
+73BF, C1, AMD Radeon RX 6800 XT
+73BF, C3, AMD Radeon RX 6800
9874, C4, AMD Radeon R7 Graphics
9874, C5, AMD Radeon R6 Graphics
9874, C6, AMD Radeon R6 Graphics
@@ -217,4 +283,5 @@
9874, 87, AMD Radeon R5 Graphics
9874, 85, AMD Radeon R6 Graphics
9874, 84, AMD Radeon R7 Graphics
+6FDF, E7, AMD Radeon RX 590 GME
6FDF, EF, AMD Radeon RX 580 2048SP
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/etnaviv/meson.build
--- a/external/mit/libdrm/dist/etnaviv/meson.build Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/etnaviv/meson.build Tue Apr 27 03:01:48 2021 +0000
@@ -19,7 +19,7 @@
# SOFTWARE.
-libdrm_etnaviv = shared_library(
+libdrm_etnaviv = library(
'drm_etnaviv',
[
files(
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/exynos/meson.build
--- a/external/mit/libdrm/dist/exynos/meson.build Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/exynos/meson.build Tue Apr 27 03:01:48 2021 +0000
@@ -18,7 +18,7 @@
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
-libdrm_exynos = shared_library(
+libdrm_exynos = library(
'drm_exynos',
[files('exynos_drm.c', 'exynos_fimg2d.c'), config_file],
c_args : libdrm_c_args,
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/freedreno/meson.build
--- a/external/mit/libdrm/dist/freedreno/meson.build Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/freedreno/meson.build Tue Apr 27 03:01:48 2021 +0000
@@ -39,7 +39,7 @@
)
endif
-libdrm_freedreno = shared_library(
+libdrm_freedreno = library(
'drm_freedreno',
[files_freedreno, config_file],
c_args : libdrm_c_args,
diff -r 89f6ddfdeecb -r 4e73141a4d5c external/mit/libdrm/dist/include/drm/amdgpu_drm.h
--- a/external/mit/libdrm/dist/include/drm/amdgpu_drm.h Tue Apr 27 02:11:31 2021 +0000
+++ b/external/mit/libdrm/dist/include/drm/amdgpu_drm.h Tue Apr 27 03:01:48 2021 +0000
@@ -125,13 +125,19 @@
/* Flag that BO sharing will be explicitly synchronized */
#define AMDGPU_GEM_CREATE_EXPLICIT_SYNC (1 << 7)
/* Flag that indicates allocating MQD gart on GFX9, where the mtype
- * for the second page onward should be set to NC.
+ * for the second page onward should be set to NC. It should never
+ * be used by user space applications.
*/
-#define AMDGPU_GEM_CREATE_MQD_GFX9 (1 << 8)
+#define AMDGPU_GEM_CREATE_CP_MQD_GFX9 (1 << 8)
/* Flag that BO may contain sensitive data that must be wiped before
* releasing the memory
*/
#define AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE (1 << 9)
+/* Flag that BO will be encrypted and that the TMZ bit should be
+ * set in the PTEs when mapping this buffer via GPUVM or
+ * accessing it with various hw blocks
+ */
+#define AMDGPU_GEM_CREATE_ENCRYPTED (1 << 10)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */
@@ -345,6 +351,10 @@
#define AMDGPU_TILING_DCC_PITCH_MAX_MASK 0x3FFF
#define AMDGPU_TILING_DCC_INDEPENDENT_64B_SHIFT 43
#define AMDGPU_TILING_DCC_INDEPENDENT_64B_MASK 0x1
+#define AMDGPU_TILING_DCC_INDEPENDENT_128B_SHIFT 44
+#define AMDGPU_TILING_DCC_INDEPENDENT_128B_MASK 0x1
+#define AMDGPU_TILING_SCANOUT_SHIFT 63
+#define AMDGPU_TILING_SCANOUT_MASK 0x1
/* Set/Get helpers for tiling flags. */
#define AMDGPU_TILING_SET(field, value) \
@@ -492,14 +502,16 @@
#define AMDGPU_VM_MTYPE_MASK (0xf << 5)
/* Default MTYPE. Pre-AI must use this. Recommended for newer ASICs. */
#define AMDGPU_VM_MTYPE_DEFAULT (0 << 5)
-/* Use NC MTYPE instead of default MTYPE */
+/* Use Non Coherent MTYPE instead of default MTYPE */
#define AMDGPU_VM_MTYPE_NC (1 << 5)
-/* Use WC MTYPE instead of default MTYPE */
+/* Use Write Combine MTYPE instead of default MTYPE */
#define AMDGPU_VM_MTYPE_WC (2 << 5)
-/* Use CC MTYPE instead of default MTYPE */
+/* Use Cache Coherent MTYPE instead of default MTYPE */
#define AMDGPU_VM_MTYPE_CC (3 << 5)
-/* Use UC MTYPE instead of default MTYPE */
+/* Use UnCached MTYPE instead of default MTYPE */
#define AMDGPU_VM_MTYPE_UC (4 << 5)
+/* Use Read Write MTYPE instead of default MTYPE */
+#define AMDGPU_VM_MTYPE_RW (5 << 5)
struct drm_amdgpu_gem_va {
Home |
Main Index |
Thread Index |
Old Index