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[src/trunk]: src/sys/arch/arm/cortex Restore original size calculation for MA...
details: https://anonhg.NetBSD.org/src/rev/1ba437cd0ab9
branches: trunk
changeset: 962140:1ba437cd0ab9
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat Jun 29 16:48:07 2019 +0000
description:
Restore original size calculation for MAPD and don't disable MSI/MSIX on devices before making changes
diffstat:
sys/arch/arm/cortex/gicv3_its.c | 16 ++++------------
1 files changed, 4 insertions(+), 12 deletions(-)
diffs (51 lines):
diff -r 885e88665ff5 -r 1ba437cd0ab9 sys/arch/arm/cortex/gicv3_its.c
--- a/sys/arch/arm/cortex/gicv3_its.c Sat Jun 29 16:41:18 2019 +0000
+++ b/sys/arch/arm/cortex/gicv3_its.c Sat Jun 29 16:48:07 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3_its.c,v 1.18 2019/06/29 13:30:59 jmcneill Exp $ */
+/* $NetBSD: gicv3_its.c,v 1.19 2019/06/29 16:48:07 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#define _INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3_its.c,v 1.18 2019/06/29 13:30:59 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3_its.c,v 1.19 2019/06/29 16:48:07 jmcneill Exp $");
#include <sys/param.h>
#include <sys/kmem.h>
@@ -329,8 +329,8 @@
/*
* Map the device to the ITT
*/
- const u_int size = ilog2(vectors) - 1;
- gits_command_mapd(its, devid, dev->dev_itt.segs[0].ds_addr, size, true);
+ const u_int id_bits = __SHIFTOUT(typer, GITS_TYPER_ID_bits) + 1;
+ gits_command_mapd(its, devid, dev->dev_itt.segs[0].ds_addr, id_bits - 1, true);
gits_wait(its);
return 0;
@@ -349,10 +349,6 @@
panic("gicv3_its_msi_enable: device is not MSI-capable");
ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
- ctl &= ~PCI_MSI_CTL_MSI_ENABLE;
- pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
-
- ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
ctl &= ~PCI_MSI_CTL_MME_MASK;
ctl |= __SHIFTIN(ilog2(count), PCI_MSI_CTL_MME_MASK);
pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
@@ -406,10 +402,6 @@
if (!pci_get_capability(pc, tag, PCI_CAP_MSIX, &off, NULL))
panic("gicv3_its_msix_enable: device is not MSI-X-capable");
- ctl = pci_conf_read(pc, tag, off + PCI_MSIX_CTL);
- ctl &= ~PCI_MSIX_CTL_ENABLE;
- pci_conf_write(pc, tag, off + PCI_MSIX_CTL, ctl);
-
const uint64_t addr = its->its_base + GITS_TRANSLATER;
const uint64_t entry_base = PCI_MSIX_TABLE_ENTRY_SIZE * msix_vec;
bus_space_write_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_ADDR_LO, (uint32_t)addr);
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