[src/netbsd-9]: src/sys/arch/x86/x86 Pull up following revision(s) (requested...

[martin <martin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/5b86ec85fb0b
branches:  netbsd-9
changeset: 964012:5b86ec85fb0b
user:      martin <martin%NetBSD.org@localhost>
date:      Wed Jul 15 14:02:36 2020 +0000

description:
Pull up following revision(s) (requested by msaitoh in ticket #1009):

        sys/arch/x86/x86/coretemp.c: revision 1.37

  Add special handling for model 0x0f stepping >=2 or mode 0x0e to get Tjmax.

diffstat:

 sys/arch/x86/x86/coretemp.c |  18 ++++++++++++++++--
 1 files changed, 16 insertions(+), 2 deletions(-)

diffs (46 lines):

diff -r 118f67f06237 -r 5b86ec85fb0b sys/arch/x86/x86/coretemp.c
--- a/sys/arch/x86/x86/coretemp.c       Wed Jul 15 13:52:05 2020 +0000
+++ b/sys/arch/x86/x86/coretemp.c       Wed Jul 15 14:02:36 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: coretemp.c,v 1.36 2018/07/11 03:36:32 msaitoh Exp $ */
+/* $NetBSD: coretemp.c,v 1.36.4.1 2020/07/15 14:02:36 martin Exp $ */
 
 /*-
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
@@ -61,7 +61,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.36 2018/07/11 03:36:32 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: coretemp.c,v 1.36.4.1 2020/07/15 14:02:36 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/device.h>
@@ -271,6 +271,19 @@
        sc->sc_tjmax = 100;
 
        if ((model == 0x0f && stepping >= 2) || (model == 0x0e)) {
+               /*
+                * Check MSR_IA32_PLATFORM_ID(0x17) bit 28. It's not documented
+                * in the datasheet, but the following page describes the
+                * detail:
+                *   http://software.intel.com/en-us/articles/
+                *     mobile-intel-core2-processor-detection-table/
+                *   Was: http://softwarecommunity.intel.com/Wiki/Mobility/
+                *     720.htm
+                */
+               if (rdmsr_safe(MSR_IA32_PLATFORM_ID, &msr) != 0)
+                       goto notee;
+               if ((model < 0x17) && ((msr & __BIT(28)) == 0))
+                       goto notee;
 
                if (rdmsr_safe(MSR_IA32_EXT_CONFIG, &msr) == EFAULT)
                        return;
@@ -290,6 +303,7 @@
                } else
                        sc->sc_tjmax = 90;
        } else {
+notee:
                /*
                 * Attempt to get Tj(max) from IA32_TEMPERATURE_TARGET,
                 * but only consider the interval [70, 110] C as valid.