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[src/netbsd-9]: src/usr.sbin/cpuctl/arch Pull up following revision(s) (reque...
details: https://anonhg.NetBSD.org/src/rev/263b84a7346b
branches: netbsd-9
changeset: 963784:263b84a7346b
user: martin <martin%NetBSD.org@localhost>
date: Tue Apr 14 17:15:02 2020 +0000
description:
Pull up following revision(s) (requested by msaitoh in ticket #833):
usr.sbin/cpuctl/arch/i386.c: revision 1.109
sys/arch/x86/include/specialreg.h: revision 1.159
usr.sbin/cpuctl/arch/i386.c: revision 1.110
sys/arch/x86/include/specialreg.h: revision 1.160
sys/arch/x86/include/specialreg.h: revision 1.161
sys/arch/x86/x86/tsc.c: revision 1.40
sys/arch/x86/x86/procfs_machdep.c: revision 1.35
sys/arch/x86/x86/procfs_machdep.c: revision 1.36
Add Fast Short Rep Mov(fsrm).
Add AVX512_VP2INTERSECT, SERIALIZE and TSXLDTRK(TSX suspend load addr tracking)
CPUID Fn00000001 %edx bit 8 is printed as "TSC", so rename CPUID Fn8000_0007
%edx bit 8 from "TSC" to "ITSC" (Invariant TSC) to avoid confusion.
Rename CPUID_APM_TSC to CPUID_APM_ITSC. No functional change.
Remove ci_max_ext_cpuid because it's the same as ci_cpuid_extlevel.
Print CPUID 0x80000007 %edx on both Intel and AMD.
diffstat:
sys/arch/x86/include/specialreg.h | 18 ++++++++++++------
sys/arch/x86/x86/procfs_machdep.c | 8 ++++----
sys/arch/x86/x86/tsc.c | 6 +++---
usr.sbin/cpuctl/arch/i386.c | 26 ++++++++++----------------
4 files changed, 29 insertions(+), 29 deletions(-)
diffs (202 lines):
diff -r d4ed1ac33af0 -r 263b84a7346b sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Tue Apr 14 17:02:28 2020 +0000
+++ b/sys/arch/x86/include/specialreg.h Tue Apr 14 17:15:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.150.2.5 2019/11/19 13:15:57 martin Exp $ */
+/* $NetBSD: specialreg.h,v 1.150.2.6 2020/04/14 17:15:02 martin Exp $ */
/*
* Copyright (c) 2014-2019 The NetBSD Foundation, Inc.
@@ -475,9 +475,12 @@
#define CPUID_SEF_AVX512_4VNNIW __BIT(2)
#define CPUID_SEF_AVX512_4FMAPS __BIT(3)
#define CPUID_SEF_FSREP_MOV __BIT(4) /* Fast Short REP MOV */
+#define CPUID_SEF_AVX512_VP2INTERSECT __BIT(8)
#define CPUID_SEF_MD_CLEAR __BIT(10)
#define CPUID_SEF_TSX_FORCE_ABORT __BIT(13) /* MSR_TSX_FORCE_ABORT bit 0 */
+#define CPUID_SEF_SERIALIZE __BIT(14)
#define CPUID_SEF_HYBRID __BIT(15) /* Hybrid part */
+#define CPUID_SEF_TSXLDTRK __BIT(16) /* TSX suspend load addr tracking */
#define CPUID_SEF_CET_IBT __BIT(20) /* CET Indirect Branch Tracking */
#define CPUID_SEF_IBRS __BIT(26) /* IBRS / IBPB Speculation Control */
#define CPUID_SEF_STIBP __BIT(27) /* STIBP Speculation Control */
@@ -489,8 +492,9 @@
#define CPUID_SEF_FLAGS2 "\20" \
"\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \
"\5" "FSREP_MOV" \
- "\13" "MD_CLEAR" \
- "\16" "TSX_FORCE_ABORT" "\20" "HYBRID" \
+ "\11" "VP2INTERSECT" "\13" "MD_CLEAR" \
+ "\16TSX_FORCE_ABORT" "\17SERIALIZE" "\20HYBRID" \
+ "\21" "TSXLDTRK" \
"\25" "CET_IBT" \
"\33" "IBRS" "\34" "STIBP" \
"\35" "L1D_FLUSH" "\36" "ARCH_CAP" "\37CORE_CAP" "\40" "SSBD"
@@ -693,8 +697,10 @@
"\35" "L2IPERFC" "\36" "MWAITX" "\37" "B30" "\40" "B31"
/*
- * AMD Advanced Power Management
+ * Advanced Power Management
* CPUID Fn8000_0007 %edx
+ *
+ * Only ITSC is for both Intel and AMD. Others are only for AMD.
*/
#define CPUID_APM_TS 0x00000001 /* Temperature Sensor */
#define CPUID_APM_FID 0x00000002 /* Frequency ID control */
@@ -704,7 +710,7 @@
#define CPUID_APM_STC 0x00000020 /* Software thermal control (STC) */
#define CPUID_APM_100 0x00000040 /* 100MHz multiplier control */
#define CPUID_APM_HWP 0x00000080 /* HW P-State control */
-#define CPUID_APM_TSC 0x00000100 /* TSC invariant */
+#define CPUID_APM_ITSC 0x00000100 /* invariant TSC */
#define CPUID_APM_CPB 0x00000200 /* Core performance boost */
#define CPUID_APM_EFF 0x00000400 /* Effective Frequency (read-only) */
#define CPUID_APM_PROCFI 0x00000800 /* Proc Feedback Interface */
@@ -715,7 +721,7 @@
#define CPUID_APM_FLAGS "\20" \
"\1" "TS" "\2" "FID" "\3" "VID" "\4" "TTP" \
"\5" "HTC" "\6" "STC" "\7" "100" "\10" "HWP" \
- "\11" "TSC" "\12" "CPB" "\13" "EffFreq" "\14" "PROCFI" \
+ "\11" "ITSC" "\12" "CPB" "\13" "EffFreq" "\14" "PROCFI" \
"\15" "PROCPR" "\16" "CONNSTBY" "\17" "RAPL"
/*
diff -r d4ed1ac33af0 -r 263b84a7346b sys/arch/x86/x86/procfs_machdep.c
--- a/sys/arch/x86/x86/procfs_machdep.c Tue Apr 14 17:02:28 2020 +0000
+++ b/sys/arch/x86/x86/procfs_machdep.c Tue Apr 14 17:15:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.33.2.1 2019/10/17 18:56:25 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.33.2.2 2020/04/14 17:15:02 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.33.2.1 2019/10/17 18:56:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.33.2.2 2020/04/14 17:15:02 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -188,8 +188,8 @@
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL},
{ /* (18) Intel 0x00000007 edx */
- NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", NULL, NULL, NULL, NULL,
- NULL, NULL, "md_clear", NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", "fsrm", NULL, NULL, NULL,
+ "vp2intersect", NULL, "md_clear", NULL, NULL, NULL, NULL, NULL,
NULL, NULL, "pconfig", NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
"flush_l1d", "arch_capabilities", NULL, "ssbd"},
diff -r d4ed1ac33af0 -r 263b84a7346b sys/arch/x86/x86/tsc.c
--- a/sys/arch/x86/x86/tsc.c Tue Apr 14 17:02:28 2020 +0000
+++ b/sys/arch/x86/x86/tsc.c Tue Apr 14 17:15:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tsc.c,v 1.37 2017/10/02 19:23:16 maxv Exp $ */
+/* $NetBSD: tsc.c,v 1.37.8.1 2020/04/14 17:15:02 martin Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.37 2017/10/02 19:23:16 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.37.8.1 2020/04/14 17:15:02 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -135,7 +135,7 @@
x86_cpuid(0x80000000, descs);
if (descs[0] >= 0x80000007) {
x86_cpuid(0x80000007, descs);
- invariant = (descs[3] & CPUID_APM_TSC) != 0;
+ invariant = (descs[3] & CPUID_APM_ITSC) != 0;
}
}
diff -r d4ed1ac33af0 -r 263b84a7346b usr.sbin/cpuctl/arch/i386.c
--- a/usr.sbin/cpuctl/arch/i386.c Tue Apr 14 17:02:28 2020 +0000
+++ b/usr.sbin/cpuctl/arch/i386.c Tue Apr 14 17:15:02 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: i386.c,v 1.104.2.4 2019/11/19 13:15:57 martin Exp $ */
+/* $NetBSD: i386.c,v 1.104.2.5 2020/04/14 17:15:02 martin Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: i386.c,v 1.104.2.4 2019/11/19 13:15:57 martin Exp $");
+__RCSID("$NetBSD: i386.c,v 1.104.2.5 2020/04/14 17:15:02 martin Exp $");
#endif /* not lint */
#include <sys/types.h>
@@ -119,7 +119,6 @@
uint8_t ci_coreid;
uint8_t ci_smtid;
uint32_t ci_initapicid;
- uint32_t ci_max_ext_cpuid;
uint32_t ci_cur_xsave;
uint32_t ci_max_xsave;
@@ -1944,7 +1943,7 @@
x86_cpuid(1, descs);
lp_max = __SHIFTOUT(descs[1], CPUID_HTT_CORES);
- if (cpu_family >= 0x10 && ci->ci_max_ext_cpuid >= 0x8000008) {
+ if (cpu_family >= 0x10 && ci->ci_cpuid_extlevel >= 0x8000008) {
x86_cpuid(0x8000008, descs);
core_max = (descs[2] & 0xff) + 1;
n = (descs[2] >> 12) & 0x0f;
@@ -2287,22 +2286,18 @@
cpuname, descs[0]);
}
- if (cpu_vendor == CPUVENDOR_AMD) {
- x86_cpuid(0x80000000, descs);
- if (descs[0] >= 0x80000000)
- ci->ci_max_ext_cpuid = descs[0];
- else
- ci->ci_max_ext_cpuid = 0;
- if (ci->ci_max_ext_cpuid >= 0x80000007)
+ if ((cpu_vendor == CPUVENDOR_INTEL) || (cpu_vendor == CPUVENDOR_AMD))
+ if (ci->ci_cpuid_extlevel >= 0x80000007)
powernow_probe(ci);
- if (ci->ci_max_ext_cpuid >= 0x80000008) {
+ if (cpu_vendor == CPUVENDOR_AMD) {
+ if (ci->ci_cpuid_extlevel >= 0x80000008) {
x86_cpuid(0x80000008, descs);
print_bits(cpuname, "AMD Extended features",
CPUID_CAPEX_FLAGS, descs[1]);
}
- if ((ci->ci_max_ext_cpuid >= 0x8000000a)
+ if ((ci->ci_cpuid_extlevel >= 0x8000000a)
&& (ci->ci_feat_val[3] & CPUID_SVM) != 0) {
x86_cpuid(0x8000000a, descs);
aprint_verbose("%s: SVM Rev. %d\n", cpuname,
@@ -2312,7 +2307,7 @@
print_bits(cpuname, "SVM features",
CPUID_AMD_SVM_FLAGS, descs[3]);
}
- if (ci->ci_max_ext_cpuid >= 0x8000001f) {
+ if (ci->ci_cpuid_extlevel >= 0x8000001f) {
x86_cpuid(0x8000001f, descs);
print_bits(cpuname, "Encrypted Memory features",
CPUID_AMD_ENCMEM_FLAGS, descs[0]);
@@ -2572,8 +2567,7 @@
x86_cpuid(0x80000007, regs);
snprintb(buf, sizeof(buf), CPUID_APM_FLAGS, regs[3]);
- aprint_normal_dev(ci->ci_dev, "AMD Power Management features: %s\n",
- buf);
+ aprint_normal_dev(ci->ci_dev, "Power Management features: %s\n", buf);
}
bool
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