[src/trunk]: src/sys/external/bsd/drm2/dist/drm/i915 Use unsigned to avoid un...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9bee4ac749f5
branches:  trunk
changeset: 964572:9bee4ac749f5
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Wed Aug 07 14:58:04 2019 +0000

description:
Use unsigned to avoid undefined behavior. Found by kUBSan.

diffstat:

 sys/external/bsd/drm2/dist/drm/i915/i915_reg.h |  8 ++++----
 sys/external/bsd/drm2/dist/drm/i915/intel_pm.c |  6 +++---
 2 files changed, 7 insertions(+), 7 deletions(-)

diffs (63 lines):

diff -r 5f8eb0df31c0 -r 9bee4ac749f5 sys/external/bsd/drm2/dist/drm/i915/i915_reg.h
--- a/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h    Wed Aug 07 13:46:02 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h    Wed Aug 07 14:58:04 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i915_reg.h,v 1.9 2019/08/05 13:28:31 msaitoh Exp $     */
+/*     $NetBSD: i915_reg.h,v 1.10 2019/08/07 14:58:04 msaitoh Exp $    */
 
 /* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
@@ -2032,7 +2032,7 @@
 #define FBC_CFB_BASE           0x03200 /* 4k page aligned */
 #define FBC_LL_BASE            0x03204 /* 4k page aligned */
 #define FBC_CONTROL            0x03208
-#define   FBC_CTL_EN           (1<<31)
+#define   FBC_CTL_EN           __BIT(31)
 #define   FBC_CTL_PERIODIC     (1<<30)
 #define   FBC_CTL_INTERVAL_SHIFT (16)
 #define   FBC_CTL_UNCOMPRESSIBLE (1<<14)
@@ -3540,7 +3540,7 @@
 
 /* Panel fitting */
 #define PFIT_CONTROL   (dev_priv->info.display_mmio_offset + 0x61230)
-#define   PFIT_ENABLE          (1 << 31)
+#define   PFIT_ENABLE          __BIT(31)
 #define   PFIT_PIPE_MASK       (3 << 29)
 #define   PFIT_PIPE_SHIFT      29
 #define   VERT_INTERP_DISABLE  (0 << 10)
@@ -4583,7 +4583,7 @@
 /* pnv/gen4/g4x/vlv/chv */
 #define DSPFW1                 (dev_priv->info.display_mmio_offset + 0x70034)
 #define   DSPFW_SR_SHIFT               23
-#define   DSPFW_SR_MASK                        (0x1ff<<23)
+#define   DSPFW_SR_MASK                        (0x1ffU<<23)
 #define   DSPFW_CURSORB_SHIFT          16
 #define   DSPFW_CURSORB_MASK           (0x3f<<16)
 #define   DSPFW_PLANEB_SHIFT           8
diff -r 5f8eb0df31c0 -r 9bee4ac749f5 sys/external/bsd/drm2/dist/drm/i915/intel_pm.c
--- a/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c    Wed Aug 07 13:46:02 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c    Wed Aug 07 14:58:04 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intel_pm.c,v 1.18 2019/08/05 10:14:19 msaitoh Exp $    */
+/*     $NetBSD: intel_pm.c,v 1.19 2019/08/07 14:58:04 msaitoh Exp $    */
 
 /*
  * Copyright © 2012 Intel Corporation
@@ -28,7 +28,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_pm.c,v 1.18 2019/08/05 10:14:19 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_pm.c,v 1.19 2019/08/07 14:58:04 msaitoh Exp $");
 
 #include <linux/bitops.h>
 #include <linux/cpufreq.h>
@@ -289,7 +289,7 @@
 }
 
 #define FW_WM(value, plane) \
-       (((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK)
+       (((u32)(value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK)
 
 void intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable)
 {