[src/trunk]: src/sys/arch/arm/include cpu identification macros for A17

[tnn <tnn%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9ee058dabb2e
branches:  trunk
changeset: 965248:9ee058dabb2e
user:      tnn <tnn%NetBSD.org@localhost>
date:      Sun Sep 08 08:10:13 2019 +0000

description:
cpu identification macros for A17

diffstat:

 sys/arch/arm/include/cputypes.h |  4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diffs (19 lines):

diff -r 7f5f86b648ef -r 9ee058dabb2e sys/arch/arm/include/cputypes.h
--- a/sys/arch/arm/include/cputypes.h   Sun Sep 08 07:59:43 2019 +0000
+++ b/sys/arch/arm/include/cputypes.h   Sun Sep 08 08:10:13 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cputypes.h,v 1.9 2019/09/07 19:42:42 tnn Exp $ */
+/*     $NetBSD: cputypes.h,v 1.10 2019/09/08 08:10:13 tnn Exp $        */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -180,7 +180,9 @@
 #define CPU_ID_CORTEX_A7_P(n)  ((n & 0xff0ff0f0) == 0x410fc070)
 #define CPU_ID_CORTEX_A8_P(n)  ((n & 0xff0ff0f0) == 0x410fc080)
 #define CPU_ID_CORTEX_A9_P(n)  ((n & 0xff0ff0f0) == 0x410fc090)
+#define CPU_ID_CORTEX_A12_P(n) ((n & 0xff0ff0f0) == 0x410fc0d0)
 #define CPU_ID_CORTEX_A15_P(n) ((n & 0xff0ff0f0) == 0x410fc0f0)
+#define CPU_ID_CORTEX_A17_P(n) ((n & 0xff0ff0f0) == 0x410fc0e0)
 #define CPU_ID_CORTEX_A32_P(n) ((n & 0xff0ff0f0) == 0x410fd010)
 #define CPU_ID_CORTEX_A35_P(n) ((n & 0xff0ff0f0) == 0x410fd040)
 #define CPU_ID_CORTEX_A53_P(n) ((n & 0xff0ff0f0) == 0x410fd030)