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[src/trunk]: src/external/gpl3/gcc/usr.bin/gcc/arch/earmv7hf add new files
details: https://anonhg.NetBSD.org/src/rev/b93726fd1d6b
branches: trunk
changeset: 966289:b93726fd1d6b
user: christos <christos%NetBSD.org@localhost>
date: Thu Oct 24 03:26:06 2019 +0000
description:
add new files
XXX: all the arms need regen
diffstat:
external/gpl3/gcc/usr.bin/gcc/arch/earmv7hf/arm-cpu-cdata.h | 3591 +++++++++++
external/gpl3/gcc/usr.bin/gcc/arch/earmv7hf/arm-cpu-data.h | 590 +
2 files changed, 4181 insertions(+), 0 deletions(-)
diffs (truncated from 4189 to 300 lines):
diff -r d086f7c54549 -r b93726fd1d6b external/gpl3/gcc/usr.bin/gcc/arch/earmv7hf/arm-cpu-cdata.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/external/gpl3/gcc/usr.bin/gcc/arch/earmv7hf/arm-cpu-cdata.h Thu Oct 24 03:26:06 2019 +0000
@@ -0,0 +1,3591 @@
+/* This file is automatically generated. DO NOT EDIT! */
+/* Generated from: NetBSD: mknative-gcc,v 1.102 2019/10/16 06:57:24 mrg Exp */
+/* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp */
+
+/* -*- buffer-read-only: t -*-
+ Generated automatically by parsecpu.awk from arm-cpus.in.
+ Do not edit.
+
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 3,
+ or (at your option) any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public
+ License along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+static const cpu_arch_extension cpu_opttab_arm9e[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm946es[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm966es[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm968es[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm10e[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm1020e[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm1022e[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm926ejs[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_arm1026ejs[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_genericv7a[] = {
+ {
+ "mp", false, false,
+ {
+ isa_bit_mp, isa_nobit
+ }
+ },
+ {
+ "sec", false, false,
+ {
+ isa_bit_sec, isa_nobit
+ }
+ },
+ {
+ "vfpv3-d16", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "vfpv3", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
+ isa_nobit
+ }
+ },
+ {
+ "vfpv3-d16-fp16", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
+ isa_nobit
+ }
+ },
+ {
+ "vfpv3-fp16", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
+ isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "vfpv4-d16", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
+ isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "vfpv4", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
+ isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "simd", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
+ isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "neon-fp16", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
+ isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "neon-vfpv4", false, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "nosimd", true, false,
+ {
+ isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32,
+ isa_bit_crypto, isa_nobit
+ }
+ },
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "neon", false, true,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
+ isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ {
+ "neon-vfpv3", false, true,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
+ isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_cortexa5[] = {
+ {
+ "nosimd", true, false,
+ {
+ isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32,
+ isa_bit_crypto, isa_nobit
+ }
+ },
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_cortexa7[] = {
+ {
+ "nosimd", true, false,
+ {
+ isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32,
+ isa_bit_crypto, isa_nobit
+ }
+ },
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_cortexa8[] = {
+ {
+ "nofp", true, false,
+ {
+ isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
+ isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
+ isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
+ }
+ },
+ { NULL, false, false, {isa_nobit}}
+};
+
+static const cpu_arch_extension cpu_opttab_cortexa9[] = {
+ {
+ "nosimd", true, false,
+ {
+ isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon, isa_bit_fp_d32,
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