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[src/trunk]: src/sys/arch/mips/mips s/defintion/definition/ in comment.
details: https://anonhg.NetBSD.org/src/rev/7005c5ef6d08
branches: trunk
changeset: 967912:7005c5ef6d08
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Fri Dec 27 09:47:18 2019 +0000
description:
s/defintion/definition/ in comment.
diffstat:
sys/arch/mips/mips/cache.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diffs (27 lines):
diff -r 099a7f0b274f -r 7005c5ef6d08 sys/arch/mips/mips/cache.c
--- a/sys/arch/mips/mips/cache.c Fri Dec 27 09:45:26 2019 +0000
+++ b/sys/arch/mips/mips/cache.c Fri Dec 27 09:47:18 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cache.c,v 1.60 2018/09/03 16:29:26 riastradh Exp $ */
+/* $NetBSD: cache.c,v 1.61 2019/12/27 09:47:18 msaitoh Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.60 2018/09/03 16:29:26 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.61 2019/12/27 09:47:18 msaitoh Exp $");
#include "opt_cputype.h"
#include "opt_mips_cache.h"
@@ -1406,7 +1406,7 @@
}
} else if (MIPS_PRID_CID(cpu_id) == MIPS_PRID_CID_MTI) {
/*
- * All MTI cores share a (mostly) common config7 defintion.
+ * All MTI cores share a (mostly) common config7 definition.
* Use it to determine if the caches have virtual aliases.
* If the core doesn't have a config7 register, its caches
* are too small or have too many ways to have aliases.
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