[src/trunk]: src/sys/arch Identify Arm Neoverse E1 and N1 CPUs.

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/fb82071baf23
branches:  trunk
changeset: 967947:fb82071baf23
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Dec 28 19:18:31 2019 +0000

description:
Identify Arm Neoverse E1 and N1 CPUs.

diffstat:

 sys/arch/aarch64/aarch64/cpu.c  |  6 ++++--
 sys/arch/arm/include/cputypes.h |  4 +++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diffs (45 lines):

diff -r 401bcc899119 -r fb82071baf23 sys/arch/aarch64/aarch64/cpu.c
--- a/sys/arch/aarch64/aarch64/cpu.c    Sat Dec 28 17:19:43 2019 +0000
+++ b/sys/arch/aarch64/aarch64/cpu.c    Sat Dec 28 19:18:31 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.30 2019/12/27 21:55:51 mlelstv Exp $ */
+/* $NetBSD: cpu.c,v 1.31 2019/12/28 19:18:31 jmcneill Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.30 2019/12/27 21:55:51 mlelstv Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.31 2019/12/28 19:18:31 jmcneill Exp $");
 
 #include "locators.h"
 #include "opt_arm_debug.h"
@@ -190,6 +190,8 @@
        { CPU_ID_CORTEXA76AER1 & CPU_PARTMASK, "Cortex-A76AE", "Cortex", "V8.2-A+" },
        { CPU_ID_CORTEXA77R0 & CPU_PARTMASK, "Cortex-A77", "Cortex", "V8.2-A+" },
        { CPU_ID_EMAG8180 & CPU_PARTMASK, "Ampere eMAG", "Skylark", "V8-A" },
+       { CPU_ID_NEOVERSEE1R1 & CPU_PARTMASK, "Neoverse E1", "Neoverse", "V8.2-A+" },
+       { CPU_ID_NEOVERSEN1R3 & CPU_PARTMASK, "Neoverse N1", "Neoverse", "V8.2-A+" },
        { CPU_ID_THUNDERXRX, "Cavium ThunderX", "Cavium", "V8-A" },
        { CPU_ID_THUNDERX81XXRX, "Cavium ThunderX CN81XX", "Cavium", "V8-A" },
        { CPU_ID_THUNDERX83XXRX, "Cavium ThunderX CN83XX", "Cavium", "V8-A" },
diff -r 401bcc899119 -r fb82071baf23 sys/arch/arm/include/cputypes.h
--- a/sys/arch/arm/include/cputypes.h   Sat Dec 28 17:19:43 2019 +0000
+++ b/sys/arch/arm/include/cputypes.h   Sat Dec 28 19:18:31 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cputypes.h,v 1.10 2019/09/08 08:10:13 tnn Exp $        */
+/*     $NetBSD: cputypes.h,v 1.11 2019/12/28 19:18:31 jmcneill Exp $   */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -173,6 +173,8 @@
 #define CPU_ID_CORTEXA75R2     0x412fd0a0
 #define CPU_ID_CORTEXA76AER1   0x411fd0e0
 #define CPU_ID_CORTEXA76R3     0x413fd0b0
+#define CPU_ID_NEOVERSEN1R3    0x413fd0c0
+#define CPU_ID_NEOVERSEE1R1    0x411fd4a0
 #define CPU_ID_CORTEXA77R0     0x410fd0d0
 
 #define CPU_ID_CORTEX_P(n)     ((n & 0xff0fe000) == 0x410fc000)