[src/trunk]: src/sys/arch/arm/cortex Fix "left shift of 255 by 24 places cann...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/cc7d49704508
branches:  trunk
changeset: 971092:cc7d49704508
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Apr 13 12:14:04 2020 +0000

description:
Fix "left shift of 255 by 24 places cannot be represented in type 'int'"
warning from UBSan.

diffstat:

 sys/arch/arm/cortex/gic.c |  8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diffs (36 lines):

diff -r 84f411c0aac6 -r cc7d49704508 sys/arch/arm/cortex/gic.c
--- a/sys/arch/arm/cortex/gic.c Mon Apr 13 12:08:05 2020 +0000
+++ b/sys/arch/arm/cortex/gic.c Mon Apr 13 12:14:04 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: gic.c,v 1.38 2018/11/16 23:25:09 jmcneill Exp $        */
+/*     $NetBSD: gic.c,v 1.39 2020/04/13 12:14:04 jmcneill Exp $        */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -34,7 +34,7 @@
 #define _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.38 2018/11/16 23:25:09 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.39 2020/04/13 12:14:04 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -415,7 +415,7 @@
                 * There are 4 irqs per TARGETS register.  For now bind
                 * to the primary cpu.
                 */
-               targets &= ~(0xff << byte_shift);
+               targets &= ~(0xffU << byte_shift);
 #if 0
 #ifdef MULTIPROCESSOR
                if (is->is_mpsafe) {
@@ -455,7 +455,7 @@
         */
        const bus_size_t priority_reg = GICD_IPRIORITYRn(is->is_irq / 4);
        uint32_t priority = gicd_read(sc, priority_reg);
-       priority &= ~(0xff << byte_shift);
+       priority &= ~(0xffU << byte_shift);
        priority |= armgic_ipl_to_priority(is->is_ipl) << byte_shift;
        gicd_write(sc, priority_reg, priority);
 }