[src/trunk]: src/sys/arch/aarch64/aarch64 fix aarch64eb MULTIPROCESSOR boot

[ryo <ryo%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/cefdcbb40d09
branches:  trunk
changeset: 976251:cefdcbb40d09
user:      ryo <ryo%NetBSD.org@localhost>
date:      Tue Sep 15 09:23:15 2020 +0000

description:
fix aarch64eb MULTIPROCESSOR boot

- set endian of EL2,EL1 and EL0 at the beginning of start() and cpu_mpstart()
- drop_to_el1() keeps the endian setting

diffstat:

 sys/arch/aarch64/aarch64/locore.S     |  36 +++++++++++++++++++++++++---------
 sys/arch/aarch64/aarch64/locore_el2.S |  10 ++++----
 sys/arch/aarch64/aarch64/start.S      |  11 ++++-----
 3 files changed, 36 insertions(+), 21 deletions(-)

diffs (143 lines):

diff -r e3b67b8cf362 -r cefdcbb40d09 sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Tue Sep 15 09:22:32 2020 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Tue Sep 15 09:23:15 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.71 2020/08/16 10:08:42 skrll Exp $        */
+/*     $NetBSD: locore.S,v 1.72 2020/09/15 09:23:15 ryo Exp $  */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.71 2020/08/16 10:08:42 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.72 2020/09/15 09:23:15 ryo Exp $")
 
 #ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
@@ -373,6 +373,30 @@
 #endif /* DEBUG_LOCORE */
 
 ENTRY_NP(cpu_mpstart)
+
+       mrs     x8, CurrentEL
+       lsr     x8, x8, #2
+       cmp     x8, #0x2
+       b.lo    1f
+
+       mrs     x8, sctlr_el2
+#ifdef __AARCH64EB__
+       orr     x8, x8, #SCTLR_EE       /* set: Big Endian */
+#else
+       bic     x8, x8, #SCTLR_EE       /* clear: Little Endian */
+#endif
+       msr     sctlr_el2, x8
+       isb
+1:
+       mrs     x8, sctlr_el1
+#ifdef __AARCH64EB__
+       orr     x8, x8, #(SCTLR_EE | SCTLR_EOE) /* set: Big Endian */
+#else
+       bic     x8, x8, #(SCTLR_EE | SCTLR_EOE) /* clear: Little Endian */
+#endif
+       msr     sctlr_el1, x8
+       isb
+
        mrs     x3, mpidr_el1
        ldr     x0, =(MPIDR_AFF0 | MPIDR_AFF1 | MPIDR_AFF2 | MPIDR_AFF3)
        and     x3, x3, x0
@@ -925,12 +949,6 @@
        ldr     x1, sctlr_set
        orr     x0, x0, x1
 
-       ldr     x1, sctlr_ee
-#ifdef __AARCH64EB__
-       orr     x0, x0, x1      /* set: BigEndian */
-#else
-       bic     x0, x0, x1      /* clear: LittleEndian */
-#endif
        msr     sctlr_el1, x0   /* enabling MMU! */
        isb
 
@@ -985,8 +1003,6 @@
 #endif
 
 
-sctlr_ee:
-       .quad (SCTLR_EE | SCTLR_EOE)    /* Endianness of Exception and EL0 */
 sctlr_set:
        .quad ( \
            SCTLR_LSMAOE |  /* Load/Store Multiple Atomicity and Ordering */ \
diff -r e3b67b8cf362 -r cefdcbb40d09 sys/arch/aarch64/aarch64/locore_el2.S
--- a/sys/arch/aarch64/aarch64/locore_el2.S     Tue Sep 15 09:22:32 2020 +0000
+++ b/sys/arch/aarch64/aarch64/locore_el2.S     Tue Sep 15 09:23:15 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore_el2.S,v 1.5 2020/09/05 17:49:26 jakllsch Exp $  */
+/*     $NetBSD: locore_el2.S,v 1.6 2020/09/15 09:23:15 ryo Exp $       */
 
 /*-
  * Copyright (c) 2012-2014 Andrew Turner
@@ -32,7 +32,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore_el2.S,v 1.5 2020/09/05 17:49:26 jakllsch Exp $")
+RCSID("$NetBSD: locore_el2.S,v 1.6 2020/09/15 09:23:15 ryo Exp $")
 
 /*
  * For use in #include "locore_el2.S".
@@ -75,9 +75,9 @@
 
        /* Set the bits that need to be 1 in SCTLR_EL1. */
        ldr     x2, .Lsctlr_res1
-#ifdef __AARCH64EB__
-       orr     x2, x2, #SCTLR_EE
-#endif
+       mrs     x1, sctlr_el1
+       and     x1, x1, #(SCTLR_EE | SCTLR_EOE) /* keep SCTLR_EL1.{EE,E0E} */
+       orr     x2, x2, x1
        msr     sctlr_el1, x2
 
        /* Don't trap to EL2 on FP instructions. */
diff -r e3b67b8cf362 -r cefdcbb40d09 sys/arch/aarch64/aarch64/start.S
--- a/sys/arch/aarch64/aarch64/start.S  Tue Sep 15 09:22:32 2020 +0000
+++ b/sys/arch/aarch64/aarch64/start.S  Tue Sep 15 09:23:15 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: start.S,v 1.9 2020/09/05 17:49:26 jakllsch Exp $       */
+/*     $NetBSD: start.S,v 1.10 2020/09/15 09:23:15 ryo Exp $   */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -33,7 +33,7 @@
 #include <aarch64/asm.h>
 #include "assym.h"
 
-RCSID("$NetBSD: start.S,v 1.9 2020/09/05 17:49:26 jakllsch Exp $")
+RCSID("$NetBSD: start.S,v 1.10 2020/09/15 09:23:15 ryo Exp $")
 
 /*
  * Padding at start of kernel image to make room for 64-byte header
@@ -59,19 +59,18 @@
 #endif
        msr     sctlr_el2, x8
        isb
-       b       2f
 
 1:
        mrs     x8, sctlr_el1
 #ifdef __AARCH64EB__
-       orr     x8, x8, #SCTLR_EE       /* set: Big Endian */
+       orr     x8, x8, #(SCTLR_EE | SCTLR_EOE) /* set: Big Endian */
 #else
-       bic     x8, x8, #SCTLR_EE       /* clear: Little Endian */
+       bic     x8, x8, #(SCTLR_EE | SCTLR_EOE) /* clear: Little Endian */
 #endif
        msr     sctlr_el1, x8
        isb
 
-2:
+
        adr     x9, start
        ldr     x10, =start