[src/trunk]: src/sys/arch/mips/mips The Cavium CN70xx PRID covers both the CN...

[simonb <simonb%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e750b0420d92
branches:  trunk
changeset: 972302:e750b0420d92
user:      simonb <simonb%NetBSD.org@localhost>
date:      Sat May 23 11:33:56 2020 +0000

description:
The Cavium CN70xx PRID covers both the CN70xx and CN71xx CPU families.

diffstat:

 sys/arch/mips/mips/mips_machdep.c |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (27 lines):

diff -r 8225cd4bd253 -r e750b0420d92 sys/arch/mips/mips/mips_machdep.c
--- a/sys/arch/mips/mips/mips_machdep.c Sat May 23 11:32:02 2020 +0000
+++ b/sys/arch/mips/mips/mips_machdep.c Sat May 23 11:33:56 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mips_machdep.c,v 1.280 2020/05/23 10:48:43 simonb Exp $        */
+/*     $NetBSD: mips_machdep.c,v 1.281 2020/05/23 11:33:56 simonb Exp $        */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -111,7 +111,7 @@
  */
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.280 2020/05/23 10:48:43 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.281 2020/05/23 11:33:56 simonb Exp $");
 
 #define __INTR_PRIVATE
 #include "opt_cputype.h"
@@ -670,7 +670,7 @@
          MIPS_CP0FL_EBASE | MIPS_CP0FL_CONFIG | MIPS_CP0FL_HWRENA |
          MIPS_CP0FL_CONFIG1 | MIPS_CP0FL_CONFIG2 | MIPS_CP0FL_CONFIG3,
          0,
-         "CN70xx"              },
+         "CN70xx/CN71xx"       },
 
        /* Microsoft Research' extensible MIPS */
        { MIPS_PRID_CID_MICROSOFT, MIPS_eMIPS, 1, -1, CPU_ARCH_MIPS1, 64,