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[src/trunk]: src/sys/arch/arm/include Fix the barrier confusion. From Riastr...
details: https://anonhg.NetBSD.org/src/rev/2c0dc3dd06f9
branches: trunk
changeset: 982821:2c0dc3dd06f9
user: skrll <skrll%NetBSD.org@localhost>
date: Tue Apr 27 06:03:09 2021 +0000
description:
Fix the barrier confusion. From Riastradh - thanks!.
diffstat:
sys/arch/arm/include/lock.h | 39 +++++++++++++++++++--------------------
1 files changed, 19 insertions(+), 20 deletions(-)
diffs (97 lines):
diff -r 23e6278388d9 -r 2c0dc3dd06f9 sys/arch/arm/include/lock.h
--- a/sys/arch/arm/include/lock.h Tue Apr 27 05:40:29 2021 +0000
+++ b/sys/arch/arm/include/lock.h Tue Apr 27 06:03:09 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.37 2021/04/26 16:35:54 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.38 2021/04/27 06:03:09 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -131,32 +131,34 @@
}
#endif /* !_ARM_ARCH_6 */
+/* load/dmb implies load-acquire */
static __inline void
-__arm_membar_producer(void)
+__arm_load_dmb(void)
{
#if defined(_ARM_ARCH_7)
- __asm __volatile("dsb" ::: "memory");
-#elif defined(_ARM_ARCH_6)
- __asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
-#endif
-}
-
-static __inline void
-__arm_membar_consumer(void)
-{
-#if defined(_ARM_ARCH_7)
- __asm __volatile("dmb" ::: "memory");
+ __asm __volatile("dmb ish" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
#endif
}
+/* dmb/store implies store-release */
+static __inline void
+__arm_dmb_store(void)
+{
+#if defined(_ARM_ARCH_7)
+ __asm __volatile("dmb ish" ::: "memory");
+#elif defined(_ARM_ARCH_6)
+ __asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
+#endif
+}
+
+
static __inline void __unused
__cpu_simple_lock_init(__cpu_simple_lock_t *__alp)
{
*__alp = __SIMPLELOCK_UNLOCKED;
- __arm_membar_producer();
}
#if !defined(__thumb__) || defined(_ARM_ARCH_T2)
@@ -164,12 +166,11 @@
__cpu_simple_lock(__cpu_simple_lock_t *__alp)
{
#if defined(_ARM_ARCH_6)
- __arm_membar_consumer();
do {
/* spin */
} while (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED
|| __arm_store_exclusive(__alp, __SIMPLELOCK_LOCKED));
- __arm_membar_producer();
+ __arm_load_dmb();
#else
while (__swp(__SIMPLELOCK_LOCKED, __alp) != __SIMPLELOCK_UNLOCKED)
continue;
@@ -184,13 +185,12 @@
__cpu_simple_lock_try(__cpu_simple_lock_t *__alp)
{
#if defined(_ARM_ARCH_6)
- __arm_membar_consumer();
do {
if (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED) {
return 0;
}
} while (__arm_store_exclusive(__alp, __SIMPLELOCK_LOCKED));
- __arm_membar_producer();
+ __arm_load_dmb();
return 1;
#else
return (__swp(__SIMPLELOCK_LOCKED, __alp) == __SIMPLELOCK_UNLOCKED);
@@ -213,9 +213,8 @@
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
}
#else
- __arm_membar_consumer();
+ __arm_dmb_store();
*__alp = __SIMPLELOCK_UNLOCKED;
- __arm_membar_producer();
#endif
}
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